Home >>> ON-Semiconductor >>> 74ACT109 Datasheet


74ACT109 Datasheet

Part Name74ACT109(2001) ON-Semiconductor
ON Semiconductor ON-Semiconductor
DescriptionDual JK Positive Edge?Triggered Flip?Flop
Other Doc.  lastest PDF  
PDF DOWNLOAD     


MC74ACT109 image

The MC74AC109/74ACT109 consists of two high–speed completely independent transition clocked JK flip–flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip–flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together.
   Asynchronous Inputs:
      LOW input to SD (Set) sets Q to HIGH level
      LOW input to CD (Clear) sets Q to LOW level
      Clear and Set are independent of clock
      Simultaneous LOW on CD and SD makes both Q and Q HIGH
  
• Outputs Source/Sink 24 mA
• ′ACT109 Has TTL Compatible Inputs

Page Links : 1  2  3  4  5  6  7  8  9  10  11  12 
Share Link : 

HOME '74ACT109' Search

Other manufacturer searches related to 74ACT109

74ACT109 Dual JK Positive Edge-Triggered Flip-Flop

Other parts:74AC109, 74AC109MTC, 74AC109MTCX, 74AC109PC, 74AC109PCX...
View Fairchild Semiconductor  
74ACT109 Dual JK positive edge-triggered flip-flop

Other parts:74AC109, MC74AC109, MC74AC109D, MC74AC109N...
View Motorola => Freescale  
74ACT109 Dual JK Positive Edge?Triggered Flip?Flop

Other parts:74AC109, MC74AC109, MC74ACT109, MC74AC109N...
View ON Semiconductor  
74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Other parts:54ACT109, CD54ACT109, CD74ACT109, CD74ACT109EE4...
View Texas Instruments  

Searches related to 74ACT109 description

[ ONSEMI 74AC109 ]  [ ONSEMI 74ACT109 ]  [ ONSEMI MC74AC109 ]  [ ONSEMI MC74ACT109 ]  [ ONSEMI MC74AC109N ]  [ ONSEMI MC74AC109D ]  [ ONSEMI MC74AC109DR2 ]  [ ONSEMI MC74AC109DT ]  [ ONSEMI MC74AC109DTR2 ]  [ ONSEMI MC74ACT109N

한국어     日本語     русский     简体中文     español
@ 2015 - 2018  [ Home  ] [ Privacy Policy ] [ Request Datasheet  ] [ Contact Us ]