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BT8110 Datasheet

Part NameDescriptionManufacturer
BT8110 High-Capacity ADPCM Processor ETC
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This specification describes the Bt8110 and Bt8110B multichannel ADPCM processor CMOS integrated circuits that implement Adaptive Differential Pulse-Code Modulation (ADPCM) encoding and decoding. The fixed-rate coding algorithms include those specified in ANSI Standard T1.303-1989. These algorithms are identical to those in ITU-T Recommendations G.726 and G.727. These circuits also implement the variable-rate or embedded codes specified in ANSI Standard T1.310-1991 and ITU-T Recommendation G.727.
A single ADPCM processor integrated circuit can provide 24 or 32 full-duplex channels of ADPCM processing (encoding and decoding). In some applications, two circuits can be combined to provide 48 or 64 full-duplex channels. Both A-law and µ-law PCM translations are provided.

Distinguishing Features
• Bt8110B offers internal ROM
• 24 or 32 full-duplex channel capacity (48 or 64 channels with two processors)
• 2-, 3-, 4- and 5-bit quantization dynamically selectable on a channel-by-channel, frame-by-frame basis
• Transparent channel operation
• Two control modes available: microprocessor and hardware.
• Direct framer interface for both T1 and E1 signal formats
• Supports the optimal RESET function described in the algorithm standards
• Supports even-bit inversion of A-law inputs and outputs (required by ITU-T Recommendations G.726, and G.727)
• Minimum throughput delay
• Pin compatible with Bt8110
• 8 mw per-channel, low-power CMOS

Applicable Standards
• ANSI T1.302-1987
• ANSI T1.303-1989
• ANSI T1.310-1991
• ITU-T G.726, G.727
• ANSI T1.501-1994
• ANSI T1Y1 Technical Reports #3 and #10

Applications
• T1/E1 Transcoders
• T1/E1 Multiplexers
• Personal Communications Systems:
  Digital European Cordless Telecommunications (DECT), Personal Access Communications System (PACS)
• Wireless Local Loop
• Voice PairGain
• DCME Systems
• Speech Processing/Recording
• Voice Mail/Packetization
• Voice over ATM/Frame Relay

 

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