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CD74HC93M96 Datasheet

Part NameDescriptionManufacturer
CD74HC93M96 High-Speed CMOS Logic 4-Bit Binary Ripple Counter Texas-Instruments
Texas Instruments Texas-Instruments
Other PDF  not available.
CD74HC93M96 image

The CD74HC93 and CD74HCT93 are high-speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL). These 4-bit binary ripple counters consist of four master-slave flip-flops internally connected to provide a divide-by-two section and a divide- by-eight section. Each section has a separate clock input (CP0 and CP1) to initiate state changes of the counter on the HIGH to LOW clock transition. State changes of the Qn outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used for clocks or strobes.
A gated AND asynchronous master reset (MR1 and MR2 is provided which overrides both clocks and resets (clears) all flip-flops.
Because the output from the divide by two section is not internally connected to the succeeding stages, the device may be operated in various counting modes.

• Can Be Configured to Divide By 2, 8, and 16
• Asynchronous Master Reset
• Fanout (Over Temperature Range)
   - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
   - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
   Logic ICs
• HC Types
   - 2V to 6V Operation
   - High Noise Immunity: NIL = 30%, NIH = 30% of VCC
      at VCC = 5V
• HCT Types
   - 4.5V to 5.5V Operation
   - Direct LSTTL Input Logic Compatibility,
      VIL= 0.8V (Max), VIH = 2V (Min)
   - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH

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