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CY7C1327B Datasheet

Part Name
Description
MFG CO.
CY7C1327B
Cypress
Cypress Semiconductor Cypress
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Functional Description
The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic.

Features
• Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states
• Fully registered inputs and outputs for pipelined operation
• 256K by 18 common I/O architecture
• 3.3V core power supply
• 2.5V / 3.3V I/O operation
• Fast clock-to-output times
    — 3.5 ns (for 166-MHz device)
    — 4.0 ns (for 133-MHz device)
    — 5.5 ns (for 100-MHz device)
• User-selectable burst counter supporting Intel® Pentium interleaved or linear burst sequences
• Separate processor and controller address strobes
• Synchronous self-timed writes
• Asynchronous Output Enable
• JEDEC-standard 100 TQFP pinout
• “ZZ” Sleep Mode option and Stop Clock option

 

Part Name
Description
PDF
MFG CO.
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256K x 18 Bit Pipelined BurstRAM™ Synchronous Fast Static RAM
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128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM
Motorola => Freescale
256K and 512K Pipelined BurstRAM™ Sedcondary Cache Module for Pentium™
Motorola => Freescale
256K/512K Pipelined BurstRAM™ Secondary Cache Module for Pentium™
Motorola => Freescale
128K x 36 and 256K x 18 Bit Flow–Through ZBT™ RAM Synchronous Fast Static RAM
Motorola => Freescale
128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output
AMIC Technology

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