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EPM7064SLI84-7 Datasheet

Part NameDescriptionManufacturer
EPM7064SLI84-7 Programmable logic , 64 macrocells, 4 logic array blocks, 68 I/O pins, 7ns Altera
Altera Corporation Altera
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■ High-performance, EEPROM-based programmable logic devices
(PLDs) based on second-generation MAX® architecture
■ 5.0-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in
MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
■ Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S
devices
■ Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S
devices with 128 or more macrocells
 

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