The LF2247 consists of an array of four 11 x 10-bit registered multipliers followed by a summer and a 25-bit accumulator. The LF2247 provides a coefficient register file containing four 32 x 11-bit registers which are capable of storing 32 different sets of filter coefficients for the multiplier array.
❐ 66 MHz Data Input and Computation Rate
❐ Four 11 x 10-bit Multipliers with Individual Data and Coefficient Inputs and a 25-bit Accumulator
❐ Four 32 x 11-bit Serially Loadable Coefficient Registers
❐ Fractional or Integer Two’s Complement Operands
❐ Package Styles Available:
• 84-pin PLCC, J-Lead
• 100-pin PQFP