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LVT8980AEP Datasheet

Part NameDescriptionManufacturer
LVT8980AEP EMBEDDED TEST-BUS CONTROLLER IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES TI
Texas Instruments TI
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The SN74LVT8980A embedded test-bus controllers (eTBCs) are members of the TI broad family of testability integrated circuits. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit assemblies. Unlike most other devices of this family, the eTBCs are not boundary-scannable devices; rather, their function is to master an IEEE Std 1149.1 (JTAG) test access port (TAP) under the command of an embedded host microprocessor/microcontroller. Thus, the eTBCs enable the practical and effective use of the IEEE Std 1149.1 test-access infrastructure to support embedded/built-in test, emulation, and configuration/maintenance facilities at board and system levels.

● Controlled Baseline
    − One Assembly/Test Site, One Fabrication Site
● Enhanced Diminishing Manufacturing Sources (DMS) Support
● Enhanced Product-Change Notification
● Qualification Pedigree†
● Member of Texas Instruments Broad Family of Testability Products Supporting IEEE Std 1149.1-1990 (JTAG) Test Access Port (TAP) and Boundary-Scan Architecture
● Provide Built-In Access to IEEE Std 1149.1 Scan-Accessible Test/Maintenance Facilities at Board and System Levels
● While Powered at 3.3 V, the TAP Interface Is Fully 5-V Tolerant for Mastering Both 5-V and/or 3.3-V IEEE Std 1149.1 Targets
● Simple Interface to Low-Cost 3.3-V Microprocessors/Microcontrollers Via 8-Bit Asynchronous Read/Write Data Bus
● Easy Programming Via Scan-Level Command Set and Smart TAP Control
● Transparently Generate Protocols to Support Multidrop TAP Configurations Using TI’s Addressable Scan Port
● Flexible TCK Generator Provides Programmable Division, Gated-TCK, and Free-Running-TCK Modes
● Discrete TAP Control Mode Supports Arbitrary TMS/TDI Sequences for Noncompliant Targets
● Programmable 32-Bit Test Cycle Counter Allows Virtually Unlimited Scan/Test Length
● Accommodates Target Retiming (Pipeline) Delays of Up To 15 TCK Cycles
● Test Output Enable (TOE) Allows for External Control of TAP Signals
● High-Drive Outputs (−32-mA IOH, 64-mA IOL) at TAP Support Backplane Interface and/or High Fanout

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