Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits
Home >>> ST-Microelectronics >>> M36W0R6040B0 Datasheet

M36W0R6040B0 Datasheet

Part Name
Description
MFG CO.
Other PDF
  not available.
PDF
DOWNLOAD     
M36W0R6040B0 image

SUMMARY DESCRIPTION
The M36W0R6040T0 and M36W0R6040B0 are Multiple Memory Products which combine two memory devices; a 64-Mbit, Multiple Bank Flash memories, the M58WR064FT/B, and a 16-Mbit Pseudo SRAM, the M69AR024B. Recommended operating conditions do not allow more than one memory to be active at the same time. The memory is offered in a Stacked TFBGA88 (8x10mm, 8x10 ball array, 0.8mm pitch) package.
In addition to the standard version, the packages are also available in Lead-free version, in compliance with JEDEC Std J-STD-020B, the ST ECO PACK 7191395 Specification, and the RoHS (Restriction of Hazardous Substances) directive.
All packages are compliant with Lead-free soldering processes.

FEATURES SUMMARY
■ MULTI-CHIP PACKAGE
   – 1 die of 64 Mbit (4Mb x 16) Flash Memory
   – 1 die of 16 Mbit (1Mb x 16) Pseudo SRAM
■ SUPPLY VOLTAGE
   – VDDF = VDDP = VDDQ = 1.7V to 1.95V
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
   – Manufacturer Code: 20h
   – Device Code (Top Flash Configuration), M36W0R6040T0: 8810h
   – Device Code (Bottom Flash Configuration), M36W0R6040B0: 8811h
■ PACKAGES
   – Compliant with Lead-Free Soldering Processes
   – Lead-Free Versions

FLASH MEMORY
■ PROGRAMMING TIME
   – 8µs by Word typical for Fast Factory Program
   – Double/Quadruple Word Program option
   – Enhanced Factory Program options
■ MEMORY BLOCKS
   – Multiple Bank Memory Array: 4 Mbit Banks
   – Parameter Blocks (Top location)
■ SYNCHRONOUS / ASYNCHRONOUS READ
   – Synchronous Burst Read mode: 66MHz
   – Asynchronous/ Synchronous Page Read mode
   – Random Access: 70ns
■ DUAL OPERATIONS
   – Program Erase in one Bank while Read in others
   – No delay between Read and Write operations
■ BLOCK LOCKING
   – All blocks locked at Power-up
   – Any combination of blocks can be locked
   – WPF for Block Lock-Down
■ SECURITY
   – 128-bit user programmable OTP cells
   – 64-bit unique device number
■ COMMON FLASH INTERFACE (CFI)
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK

PSRAM
■ ACCESS TIME: 70ns
■ LOW STANDBY CURRENT: 110µA
■ DEEP POWER DOWN CURRENT: 10µA

 

Page Link's: 1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18 
 

Part Name
Description
PDF
MFG CO.
512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash memory 128 Mbit (Burst) PSRAM, 1.8V supply, Multi-Chip Package
Numonyx -> Micron
256 Mbit (x16, multiple bank, multilevel, burst) Flash memory 128 Mbit (burst) PSRAM, 1.8 V supply, multichip package
Numonyx -> Micron
64 Mbit (4 Mb ×16, Multiple Bank, Burst) Flash memory and 32 Mbit (2 Mb ×16) PSRAM, multi-chip package
Numonyx -> Micron
32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product
STMicroelectronics
32 Mbit (2Mb x16, Boot Block) Flash Memory and 4 Mbit (256Kb x16) SRAM, Multiple Memory Product
STMicroelectronics
2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash
Silicon Storage Technology
Stacked MCP (multi-chip package) flash memory & SRAM 16M(x8/x16) flash memory & 2M(x8/x16) static RAM
Fujitsu
3.0 Volt Multi-Chip Package (MCP) — 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM
Integrated Silicon Solution
32 Mbit (4Mb x8 or 2Mb x16, Dual Bank 8:24, Boot Block) 3V Supply Flash Memory
Numonyx -> Micron
32 Mbit (2Mb x 16, Dual Bank, Burst ) 1.8V Supply Flash Memory
STMicroelectronics

Share Link: 

All Rights Reserved© datasheetq.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]