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Q67100-H3525 Datasheet

Part NameDescriptionManufacturer
Q67100-H3525 4 Kbit (512 × 8 bit) Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode™ Infineon
Infineon Technologies Infineon
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SLA24C04-D-3/P image

Features
• Data EEPROM internally organized as 512 bytes and 32 pages × 16 bytes
• Page protection mode, flexible page-by-page hardware write protection
   – Additional protection EEPROM of 32 bits, 1 bit per data page
   – Protection setting for each data page by writing its protection bit
   – Protection management without switching WP pin
• Low power CMOS
• VCC = 2.7 to 5.5 V operation
• Two wire serial interface bus, I2C-Bus compatible
• Filtered inputs for noise suppression with Schmitt trigger
• Clock frequency up to 400 kHz
• High programming flexibility
   – Internal programming voltage
   – Self timed programming cycle including erase
   – Byte-write and page-write programming, between 1 and 16 bytes
   – Typical programming time 5 ms for up to 16 bytes
• High reliability
   – Endurance 106 cycles1)
   – Data retention 40 years1)
   – ESD protection 4000 V on all pins
• 8 pin DIP/DSO packages
• Available for extended temperature ranges
   – Industrial: − 40 °C to + 85 °C
   – Automotive: − 40 °C to + 125 °C

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