Description
The ORCA Series 2 series of SRAM-based FPGAs are an enhanced version of the ATT2C/2T architecture.
The latest ORCA series includes patented architectural enhancements that make functions faster and easier to design while conserving the use of PLCs and routing resources.
The Series 2 devices can be used as drop-in replace ments for the ATT2Cxx/ATT2Txx series, respectively, and they are also bit stream compatible with each other. The usable gate counts associated with each series are provided in Table 1. Both series are offered in a variety of packages, speed grades, and temperature ranges.

Features
■ High-performance, cost-effective, low-power
   0.35 µm CMOS technology (OR2CxxA), 0.3 µm CMOS
   technology (OR2TxxA), and 0.25 µm CMOS technology
   (OR2TxxB), (four-input look-up table (LUT) delay less
   than 1.0 ns with -8 speed grade)
■ High density (up to 43,200 usable, logic-only gates; or
   99,400 gates including RAM)
■ Up to 480 user I/Os (OR2TxxA and OR2TxxB I/Os are
   5 V tolerant to allow interconnection to both 3.3 V and
   5 V devices, selectable on a per-pin basis)
■ Four 16-bit look-up tables and four latches/flip-flops per
   PFU, nibble-oriented for implementing 4-, 8-, 16-, and/or
   32-bit (or wider) bus structures
■ Eight 3-state buffers per PFU for on-chip bus structures
■ Fast, on-chip user SRAM has features to simplify RAM
   design and increase RAM speed:
   — Asynchronous single port: 64 bits/PFU
   — Synchronous single port: 64 bits/PFU
   — Synchronous dual port: 32 bits/PFU
■ Improved ability to combine PFUs to create larger RAM
   structures using write-port enable and 3-state buffers
■ Fast, dense multipliers can be created with the multiplier
   mode (4 x 1 multiplier/PFU):
   — 8 x 8 multiplier requires only 16 PFUs
   — 30% increase in speed
■ Flip-flop/latch options to allow programmable priority of
   synchronous set/reset vs. clock enable
■ Enhanced cascadable nibble-wide data path
   capabilities for adders, subtractors, counters, multipliers,
   and comparators including internal fast-carry operation
■ Innovative, abundant, and hierarchical nibble
   oriented routing resources that allow automatic use of
   internal gates for all device densities without sacrificing
   performance
■ Upward bit stream compatible with the ORCA ATT2Cxx/
   ATT2Txx series of devices
■ Pinout-compatible with new ORCA Series 3 FPGAs
■ TTL or CMOS input levels programmable per pin for the
   OR2CxxA (5 V) devices
■ Individually programmable drive capability:
   12 mA sink/6 mA source or 6 mA sink/3 mA source
■ Built-in boundary scan (IEEE*1149.1 JTAG) and
   3-state all I/O pins, (TS_ALL) testability functions
■ Multiple configuration options, including simple, low pin
   count serial ROMs, and peripheral or JTAG modes for in
   system programming (ISP)
■ Full PCI bus compliance for all devices
■ Supported by industry-standard CAE tools for design
   entry, synthesis, and simulation with ispLEVER
   Development System support (for back-end implementation)
■ New, added features (OR2TxxB) have:
   — More I/O per package than the OR2TxxA family
   — No dedicated 5 V supply (VDD5)
   — Faster configuration speed (40 MHz)
   — Pin selectable I/O clamping diodes provide 5V or 3.3V
      PCI compliance and 5V tolerance
   — Full PCI bus compliance in both 5V and 3.3V PCI systems

[ASCEND Semiconductor]

Description
The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 3.3V oniy power supply. Low voltage operation is more suitable to be used on battery backup, portable elec tronic application. lt is packaged in JEDEC standard 26/24-pin plastic SOJ or TSOP(II).

Features
• Single 3.3V(±10%) only power supply
• High speed tRAC acess time: 50/60ns
• Low power dissipation
   - Active mode : 432/396 mW (Mas)
   - Standby mode: 0.54 mW (Mas)
• Extended - data - out(EDO) page mode access
• I/O level: CMOS level (Vcc = 3.3V)
• 2048 refresh cycle in 32 ms(Std.) or 128 ms(S-version)
• 4 refresh modesh:
   - RAS only refresh
   - CAS - before - RAS refresh
   - Hidden refresh
   - Self-refresh(S-version)

FEATURES
1. Economical prices achieved
2. Useful for wide range of applications
   Gold-plated contact types are capable of switching under low level (1mA: reference value) to powerful high level (7A: 2-pole) loads.
3. Wide range of types available
   The Lineup includes 2-pole and 4-pole products, relays with operating indicator lights, and push-button types. You will also find relays that absorb surge when the coil goes to the off state with diodes (for DC type) or CR circuits (for AC type).
   Moreover, the availability of a broad range of coil voltages meets a wide range of needs.
4. Coil cutoff detection
   The LED that is fitted to AC coils goes off when the coil is inoperative and so provides a cutoff detection function.
5. Finger protection
   Terminal sockets with finger protection, designed to prevent fingers from touching the terminals, are also available.
6. Sockets and terminal sockets are available.

TYPICAL APPLICATIONS
   Control panels
   Power supply units
   Molding machines
   Machine tools
   Welding equipment
   Agricultural equipment
   Office equipment
   Vending machines
   Communications equipment
   Amusement machines

Mod IV Receptacle Assemblies, Single-Row, Outrigger Design .100 x .100 [2.54 x 2.54] CenterLine, End To End Stackable

[PACIFIC DISPLAY DEVICES]

Product Overview
• 128 x 64 dot matrix LCD
• STN (Super Twisted Nematic) or FSTN (Film compensated Super Twisted Nematic) Technology
• T-6963 (or equivalent) Graphics Controller IC w/ 8K SRAM.
• Multiplex drive : 1/64 duty, 1/9 bias
• LCD Module Service Life: 100,000 hours minimum

•  Large switching capacity up to 40A

•  Small size and light weight

•  PCB pin and quick connect mounting available

•  Suitable for automobile and lamp accessories

•  QS-9000, ISO-9002 Certified Manufacturing

[PACIFIC DISPLAY DEVICES]

GENERAL INFORMATION

Product Overview

• 16 Character x 2 Line Alphanumeric Dot Matrix LCD Module

• LCD Controller: Embedded S6A0069 or equivalent alpha-numeric controller

• Multiplexing driving: 1/16 duty, 1/5 bias

• Operating Mode: Super Twisted Nematic (STN) technology

• LCD Module Service Life: 100,000 hours minimum

HF to 2000 MHz Class AB Common Source - PowerSO-10RF
VHF / UHF radio and digital cellular BTS applications

HF to 2000MHz class AB common source - PowerFLAT
VHF / UHF radio applications

HF to 2000MHz class AB common cource - ceramic packages
UHF TV and digital cellular BTS applications

2 to 400MHz class AB common source N channel MOSFETs
HF / SSB, FM / VHF broadband applications

2 to 30MHz class AB Linear, common emitter, HF / SSB

Dual Output Mixed Voltage, DLV Models

The DLV (Dual Low Voltage) Series from DATEL provides both digital I/O and core logic supply voltages from a single 2" x 2" industry-standard pinout, plastic package.

Features
■ Two independently regulated outputs: 3.3V @ 6A; 2.5V, 1.8V, 1.5V or 1.2V @ 7A
■ 30 Watts total output power Available input voltage ranges:
■ 10-18V, 18-36V or 36-75V
■ Independent output voltage adjustment
■ Remote On/Off Control
■ Synchronous rectifier; No load operation
■ 2" x 2" package; Industry standard pinout
■ IEC950/UL60950/EN60950 certified
■ CE mark available (75VIN models)
■ Input under and overvoltage shutdown
■ Output overvoltage protection
■ Thermal shutdown
■ Fully Isolated (1500Vdc)

High Efficiency

Special Features
• 2.3” x 0.9” Industry Standard 8th brick outLine
• Baseplate or Openframe construction
• Low Ripple and Noise
• Regulation to zero load
• High Capacitive Load start-up
• Fixed Frequency Switching for EMI predictability
• Industry Standard features: Input UVLO with hysteresis, Enable, OVP, OCP, OTP, Output VoltageTrim, Differential Remote Sense
• Meets Basic Insulation
• EU Directive 2002/95/EC compliant for RoHS