Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

P/N + Description + Content Search

Search Word's :

Part Name(s) : AD9520-4 AD9520-4/PCBZ AD9520-4BCPZ AD9520-4BCPZ-REEL7 ADI
Analog Devices
Description : 12 LVPECL/24 CMOS Output Clock Generator with Integrated 1.6 GHz VCO View

GENERAL DESCRIPTION

The AD9520-41 provides a multiOutput Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.4 GHz to 1.8 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.

The AD9520 serial interface supports both SPI and I2C® ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register setting for power-up and chip reset.

The AD9520 features 12 LVPECL Outputs in four groups. Any of the 1.6 GHz LVPECL Outputs can be reconfigured as two 250 MHz CMOS Outputs.



FEATURES

  Low phase noise, phase-locked loop (PLL)

     On-chip VCO tunes from 1.4 GHz to 1.8 GHz

     Supports external 0 V to 5 V VCO/VCXO to 2.4 GHz

     1 differential or 2 single-ended reference inputs

     Accepts CMOS, LVDS, or LVPECL references to 250 MHz

     Accepts 16.67 MHz to 33.3 MHz crystal for reference input

     Optional reference Clock doubler

     Reference monitoring capability

     Auto and manual reference switchover/holdover modes,

     with selectable revertive/nonrevertive switching

     Glitch-free switchover between references

     Automatic recover from holdover

     Digital or analog lock detect, selectable

     Optional zero delay operation

  Twelve 1.6 GHz LVPECL Outputs divided into 4 groups

     Each group of 4 has a 1-to-32 divider with phase delay

     Additive Output jitter as low as 225 fS rms

     Channel-to-channel skew grouped Outputs <16 ps

     Each LVPECL Output can be configured as two CMOS Outputs (for fOUT ≤ 250 MHz)

  Automatic synchronization of all Outputs on power-up

  Manual synchronization of Outputs as needed

  SPI- and I²C-compatible serial control port

  64-lead LFCSP

  Nonvolatile EEPROM stores configuration settings



  APPLICATIONS

  Low jitter, low phase noise Clock distribution

  Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols

  Forward error correction (G.710)

  Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

  High performance wireless transceivers

  ATE and high performance instrumentation

  Broadband infrastructures


Part Name(s) : AD9520-1 AD9520-1/PCBZ AD9520-1BCPZ AD9520-1BCPZ-REEL7 ADI
Analog Devices
Description : 12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO View

GENERAL DESCRIPTION

The AD9520-11 provides a multiOutput Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.27 GHz to 2.65 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.

The AD9520 serial interface supports both SPI and I2C® ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset.

The AD9520 features 12 LVPECL Outputs in four groups. Any of the 1.6 GHz LVPECL Outputs can be reconfigured as two 250 MHz CMOS Outputs.



FEATURES

  Low phase noise, phase-locked loop (PLL)

     On-chip VCO tunes from 2.27 GHz to 2.65 GHz

     Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz

     1 differential or 2 single-ended reference inputs

     Accepts CMOS, LVDS, or LVPECL references to 250 MHz

     Accepts 16.67 MHz to 33.3 MHz crystal for reference input

     Optional reference Clock doubler

     Reference monitoring capability

     Auto and manual reference switchover/holdover modes, with selectable revertive/nonrevertive switching

     Glitch-free switchover between references

     Automatic recovery from holdover

     Digital or analog lock detect, selectable

     Optional zero delay operation

  Twelve 1.6 GHz LVPECL Outputs divided into 4 groups

     Each group of 3 has a 1-to-32 divider with phase delay

     Additive Output jitter as low as 225 fs rms

     Channel-to-channel skew grouped Outputs <16 ps

     Each LVPECL Output can be configured as 2 CMOS Outputs (for fOUT ≤ 250 MHz)

  Automatic synchronization of all Outputs on power-up

  Manual synchronization of Outputs as needed

  SPI- and I²C-compatible serial control port

  64-lead LFCSP

  Nonvolatile EEPROM stores configuration settings



APPLICATIONS

  Low jitter, low phase noise Clock distribution

  Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols

  Forward error correction (G.710)

  Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

  High performance wireless transceivers

  ATE and high performance instrumentation

  Broadband infrastructures



 


Part Name(s) : AD9520-0 AD9520-0/PCBZ AD9520-0BCPZ AD9520-0BCPZ-REEL7 ADI
Analog Devices
Description : 12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.8 GHz VCO View

GENERAL DESCRIPTION

The AD9520-01 provides a multiOutput Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.53 GHz to 2.95 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.

The AD9520 serial interface supports both SPI and I2C® ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset.

The AD9520 features 12 LVPECL Outputs in four groups. Any of the 1.6 GHz LVPECL Outputs can be reconfigured as two 250 MHz CMOS Outputs



FEATURES

  Low phase noise, phase-locked loop (PLL)

     On-chip VCO tunes from 2.53 GHz to 2.95 GHz

     Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz

     1 differential or 2 single-ended reference inputs

     Accepts CMOS, LVDS, or LVPECL references to 250 MHz

     Accepts 16.67 MHz to 33.3 MHz crystal for reference input

     Optional reference Clock doubler

     Reference monitoring capability

     Auto and manual reference switchover/holdover modes, with selectable revertive/nonrevertive switching

     Glitch-free switchover between references

     Automatic recovery from holdover

     Digital or analog lock detect, selectable

     Optional zero delay operation

  Twelve 1.6 GHz LVPECL Outputs divided into 4 groups

     Each group of 3 has a 1-to-32 divider with phase delay

     Additive Output jitter as low as 225 fs rms

     Channel-to-channel skew grouped Outputs <16 ps

     Each LVPECL Output can be configured as 2 CMOS Outputs (for fOUT ≤ 250 MHz)

  Automatic synchronization of all Outputs on power-up

  Manual synchronization of Outputs as needed

  SPI- and I²C-compatible serial control port

  64-lead LFCSP

  Nonvolatile EEPROM stores configuration settings

 

  APPLICATIONS

  Low jitter, low phase noise Clock distribution

  Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols

  Forward error correction (G.710)

  Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

  High performance wireless transceivers

  ATE and high performance instrumentation

  Broadband infrastructures



 


Part Name(s) : AD9520-2 AD9520-2/PCBZ AD9520-2BCPZ AD9520-2BCPZ-REEL7 ADI
Analog Devices
Description : 12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO View

GENERAL DESCRIPTION

The AD9520-21 provides a multiOutput Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.02 GHz to 2.335 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.

The AD9520 serial interface supports both SPI and I2C® ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset.

The AD9520 features 12 LVPECL Outputs in four groups. Any of the 1.6 GHz LVPECL Outputs can be reconfigured as two 250 MHz CMOS Outputs.

 

  FEATURES

  Low phase noise, phase-locked loop (PLL)

     On-chip VCO tunes from 2.02 GHz to 2.335 GHz

     Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz

     1 differential or 2 single-ended reference inputs

     Accepts CMOS, LVDS, or LVPECL references to 250 MHz

     Accepts 16.67 MHz to 33.3 MHz crystal for reference input

     Optional reference Clock doubler

     Reference monitoring capability

     Auto and manual reference switchover/holdover modes, with selectable revertive/nonrevertive switching

     Glitch-free switchover between references

     Automatic recovery from holdover

     Digital or analog lock detect, selectable

     Optional zero delay operation

  Twelve 1.6 GHz LVPECL Outputs divided into 4 groups

     Each group of 3 has a 1-to-32 divider with phase delay

     Additive Output jitter as low as 225 fs rms

     Channel-to-channel skew grouped Outputs <16 ps

     Each LVPECL Output can be configured as 2 CMOS Outputs (for fOUT ≤ 250 MHz)

  Automatic synchronization of all Outputs on power-up

  Manual synchronization of Outputs as needed

  SPI- and I²C-compatible serial control port

  64-lead LFCSP

  Nonvolatile EEPROM stores configuration settings

 

APPLICATIONS

  Low jitter, low phase noise Clock distribution

  Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols

  Forward error correction (G.710)

  Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

  High performance wireless transceivers

  ATE and high performance instrumentation

  Broadband infrastructures



 



Part Name(s) : AD9520-5 AD9520-5/PCBZ AD9520-5BCPZ AD9520-5BCPZ-REEL7 ADI
Analog Devices
Description : 12 LVPECL/24 CMOS Output Clock Generator View

GENERAL DESCRIPTION
The AD9520-51 provides a multiOutput Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL that can be used with an external VCO.
The AD9520-5 serial interface supports both SPI and I²C ports. An in-package EEPROM, which can be programmed through the serial interface, can store user-defined register settings for power-up and chip reset.
The AD9520-5 features 12 LVPECL Outputs in four groups. Any of the 1.6 GHz LVPECL Outputs can be reconfigured as two 250 MHz CMOS Outputs. If an application requires LVDS drivers instead of LVPECL drivers, refer to the AD9522-5.
Each group of three Outputs has a divider that allows both the divide ratio (from 1 to 32) and the phase offset or coarse time delay to be set.
The AD9520-5 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. The external VCO can have an operating voltage of up to 5.5 V. A separate Output driver power supply can be from 2.375 V to 3.465 V.
The AD9520-5 is specified for operation over the standard industrial range of −40°C to +85°C.

FEATURES
   Low phase noise, phase-locked loop (PLL)
      Optional external 3.3 V/5 V VCO/VCXO to 2.4 GHz
      1 differential or 2 single-ended reference inputs
      Accepts CMOS, LVDS, or LVPECL references to 250 MHz
      Accepts 16.62 MHz to 33.3 MHz crystal for reference input
      Optional reference Clock doubler
      Reference monitoring capability
      Automatic/ manual reference holdover and reference
         switchover modes, with revertive switching
      Glitch-free switchover between references
      Automatic recovery from holdover
      Digital or analog lock detect, selectable
      Optional zero delay operation
   Twelve 1.6 GHz LVPECL Outputs divided into 4 groups
      Each group of 3 Outputs shares a 1-to-32 divider with
         phase delay
      Additive Output jitter as low as 225 fs rms
      Channel-to-channel skew grouped Outputs < 16 ps
      Each LVPECL Output can be configured as 2 CMOS Outputs
         (for fOUT ≤ 250 MHz)
   Automatic synchronization of all Outputs on power-up
   Manual Output synchronization available
   SPI- and I²C-compatible serial control port
   64-lead LFCSP
   Nonvolatile EEPROM stores configuration settings

APPLICATIONS
   Low jitter, low phase noise Clock distribution
   Clock generation and translation for SONET, 10Ge, 10GFC,
      Synchronous Ethernet, OTU2/3/4
   Forward error correction (G.710)
   Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
   High performance wireless transceivers
   ATE and high performance instrumentation
   Broadband infrastructures

Part Name(s) : AD9517-1 AD9517-1A AD9517-1ABCPZ AD9517-1ABCPZ-RL7 AD9517-1A/PCBZ ADI
Analog Devices
Description : 12-Output Clock Generator with Integrated 2.5 GHz VCO View

GENERAL DESCRIPTION
The AD9517-11 provides a multi-Output Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.30 GHz to 2.65 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.

FEATURES
    Low phase noise, phase-locked loop (PLL)
        On-chip VCO tunes from 2.30 GHz to 2.65 GHz
        External VCO/VCXO to 2.4 GHz optional
        1 differential or 2 single-ended reference inputs
        Reference monitoring capability
        Automatic revertive and manual reference switchover/holdover modes
        Accepts LVPECL, LVDS, or CMOS references to 250 MHz
        Programmable delays in path to PFD
        Digital or analog lock detect, selectable
    2 pairs of 1.6 GHz LVPECL Outputs
        Each Output pair shares a 1-to-32 divider with coarse phase delay
        Additive Output jitter: 225 fs rms
        Channel-to-channel skew paired Outputs of <10 ps
    2 pairs of 800 MHz LVDS Clock Outputs
        Each Output pair shares two cascaded 1-to-32 dividers with coarse phase delay
        Additive Output jitter: 275 fs rms
        Fine delay adjust (Δt) on each LVDS Output
    Each LVDS Output can be reconfigured as two 250 MHz CMOS Outputs
    Automatic synchronization of all Outputs on power-up
    Manual Output synchronization available
    Available in a 48-lead LFCSP

APPLICATIONS
    Low jitter, low phase noise Clock distribution
    10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
    Forward error correction (G.710)
    Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
    High performance wireless transceivers
    ATE and high performance instrumentation

Part Name(s) : AD9517-3 AD9517-3A/PCBZ AD9517-3ABCPZ AD9517-3ABCPZ-RL7 AD9517-3A ADI
Analog Devices
Description : 12-Output Clock Generator with Integrated 2.0 GHz VCO View

GENERAL DESCRIPTION
The AD9517-31 provides a multi-Output Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.75 GHz to 2.25 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.

FEATURES
    Low phase noise, phase-locked loop (PLL)
        On-chip VCO tunes from 1.75 GHz to 2.25 GHz
        External VCO/VCXO to 2.4 GHz optional
        1 differential or 2 single-ended reference inputs
        Reference monitoring capability
        Automatic revertive and manual reference switchover/holdover modes
        Accepts LVPECL, LVDS, or CMOS references to 250 MHz
        Programmable delays in path to PFD
        Digital or analog lock detect, selectable
    2 pairs of 1.6 GHz LVPECL Outputs
        Each Output pair shares a 1-to-32 divider with coarse phase delay
        Additive Output jitter: 225 fs rms
        Channel-to-channel skew paired Outputs of <10 ps
    2 pairs of 800 MHz LVDS Clock Outputs
        Each Output pair shares two cascaded 1-to-32 dividers with coarse phase delay
        Additive Output jitter: 275 fs rms
        Fine delay adjust (Δt) on each LVDS Output
        Each LVDS Output can be reconfigured as two 250 MHz CMOS Outputs
    Automatic synchronization of all Outputs on power-up
    Manual Output synchronization available
    Available in a 48-lead LFCSP

APPLICATIONS
    Low jitter, low phase noise Clock distribution
    10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
    Forward error correction (G.710)
    Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
    High performance wireless transceivers
    ATE and high performance instrumentation

Part Name(s) : AD9517-4 AD9517-4A/PCBZ AD9517-4ABCPZ AD9517-4ABCPZ-RL7 AD9517-4A ADI
Analog Devices
Description : 12-Output Clock Generator with Integrated 1.6 GHz VCO View

GENERAL DESCRIPTION
The AD9517-41 provides a multi-Output Clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.45 GHz to 1.80 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.
   
FEATURES
    Low phase noise, phase-locked loop (PLL)
        On-chip VCO tunes from 1.45 GHz to 1.80 GHz
        External VCO/VCXO to 2.4 GHz optional
        1 differential or 2 single-ended reference inputs
        Reference monitoring capability
        Automatic revertive and manual reference
            switchover/holdover modes
        Accepts LVPECL, LVDS, or CMOS references to 250 MHz
        Programmable delays in path to PFD
        Digital or analog lock detect, selectable
    2 pairs of 1.6 GHz LVPECL Outputs
        Each Output pair shares a 1-to-32 divider with coarse
            phase delay
        Additive Output jitter: 225 fs rms
        Channel-to-channel skew paired Outputs of <10 ps
    2 pairs of 800 MHz LVDS Clock Outputs
        Each Output pair shares two cascaded 1-to-32 dividers
            with coarse phase delay
        Additive Output jitter: 275 fs rms
        Fine delay adjust (Δt) on each LVDS Output
    Each LVDS Output can be reconfigured as two 250 MHz
        CMOS Outputs
    Automatic synchronization of all Outputs on power-up
    Manual Output synchronization available
    Available in a 48-lead LFCSP
   
APPLICATIONS
    Low jitter, low phase noise Clock distribution
    10/40/100 Gb/sec networking line cards, including SONET,
        Synchronous Ethernet, OTU2/3/4
    Forward error correction (G.710)
    Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
    High performance wireless transceivers
    ATE and high performance instrumentation
   

Part Name(s) : AD9516-0 AD9516-0/PCBZ AD9516-0BCPZ AD9516-0BCPZ-REEL7 ADI
Analog Devices
Description : 14-Output Clock Generator with Integrated 2.8 GHz VCO View

GENERAL DESCRIPTION

The AD9516-01 provides a multi-Output Clock distribution function with subpicosecond jitter performance, along with an on chip PLL and VCO. The on-chip VCO tunes from 2.55 GHz to 2.95 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz may be used.

The AD9516-0 emphasizes low jitter and phase noise to maximize data converter performance, and can benefit other applications with demanding phase noise and jitter requirements.

The AD9516-0 features six LVPECL Outputs (in three pairs); four LVDS Outputs (in two pairs); and eight CMOS Outputs (two per LVDS Output). The LVPECL Outputs operate to 1.6 GHz, the LVDS Outputs operate to 800 MHz, and the CMOS Outputs operate to 250 MHz



FEATURES

  Low phase noise, phase-locked loop

     On-chip VCO tunes from 2.55 GHz to 2.95 GHz

     External VCO/VCXO to 2.4 GHz optional

     One differential or two single-ended reference inputs

     Reference monitoring capability

     Auto and manual reference switchover/holdover modes

     Autorecover from holdover

     Accepts references to 250 MHz

     Programmable delays in path to PFD

     Digital or analog lock detect, selectable

  3 pairs of 1.6 GHz LVPECL Outputs

     Each pair shares 1 to 32 divider with coarse phase delay

     Additive Output jitter 225 fS rms

     Channel-to-channel skew paired Outputs <10 ps

  2 pairs of 800 MHz LVDS Clock Outputs

     Each pair shares two cascaded 1 to 32 dividers with coarse phase delay

     Additive Output jitter 275 fS rms

     Fine delay adjust (ΔT) on each LVDS Output

  Eight 250 MHz CMOS Outputs (two per LVDS Output)

  Automatic synchronization of all Outputs on power-up

  Manual synchronization of Outputs as needed

  Serial control port

  64-lead LFCSP



APPLICATIONS

  Low jitter, low phase noise Clock distribution

  Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

  High performance wireless transceivers

  High performance instrumentation

  Broadband infrastructure

  ATE



 


12345678910 Next



All Rights Reserved© datasheetq.com 2015 - 2019  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]