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GENERAL DESCRIPTION
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The M[512Kx8/256Kx16][512Kx8/256Kx16]9F4000 is a 4-mega bit FLASH MEMORY organized as [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] bytes of [512Kx8/256Kx16] bits. M[512Kx8/256Kx16]IC's FLASH memories offer the most cost-effective and reliable read[512Kx8/256Kx16]write non-volatile random access MEMORY. The M[512Kx8/256Kx16][512Kx8/256Kx16]9F4000 is pac[512Kx8/256Kx16]aged in 3[512Kx8/256Kx16]-pin PDIP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.<[512Kx8/256Kx16]p>

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GENERAL DESCRIPTION
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The M[512Kx8/256Kx16][512Kx8/256Kx16]9F400T[512Kx8/256Kx16]B is a 4-mega bit FLASH MEMORY organized as [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] bytes of [512Kx8/256Kx16] bits or [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] words of [512Kx8/256Kx16][512Kx8/256Kx16] bits. M[512Kx8/256Kx16]IC's FLASH memories offer the most cost-effective and reliable read[512Kx8/256Kx16]write non-volatile random access MEMORY. The M[512Kx8/256Kx16][512Kx8/256Kx16]9F400T[512Kx8/256Kx16]B is pac[512Kx8/256Kx16]aged in 44-pin SOP, 4[512Kx8/256Kx16]-pin TSOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.<[512Kx8/256Kx16]p>

GENERAL DESCRIPTION
[512Kx8/256Kx16]>
The M[512Kx8/256Kx16][512Kx8/256Kx16]9F400T[512Kx8/256Kx16]B is a 4-mega bit FLASH MEMORY organized as [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] bytes of [512Kx8/256Kx16] bits or [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] words of [512Kx8/256Kx16][512Kx8/256Kx16] bits. M[512Kx8/256Kx16]IC's FLASH memories offer the most cost-effective and reliable read[512Kx8/256Kx16]write non-volatile random access MEMORY. The M[512Kx8/256Kx16][512Kx8/256Kx16]9F400T[512Kx8/256Kx16]B is pac[512Kx8/256Kx16]aged in 44-pin SOP, 4[512Kx8/256Kx16]-pin TSOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.<[512Kx8/256Kx16]p>

Overview
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The LE[512Kx8/256Kx16][512Kx8/256Kx16]FS40[512Kx8/256Kx16] is a SPI bus FLASH MEMORY device with a 4M bit ([512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] ×[512Kx8/256Kx16]-bit) configuration. It uses a single [512Kx8/256Kx16].[512Kx8/256Kx16]V power supply. While ma[512Kx8/256Kx16]ing the most of the features inherent to a serial FLASH MEMORY device, the LE[512Kx8/256Kx16][512Kx8/256Kx16]FS40[512Kx8/256Kx16] is housed in an [512Kx8/256Kx16]-pin ultra-miniature pac[512Kx8/256Kx16]age. All these features ma[512Kx8/256Kx16]e this device ideally suited to storing program in applications such as portable information devices, which are required to have increasingly more compact dimensions. The LE[512Kx8/256Kx16][512Kx8/256Kx16]FS40[512Kx8/256Kx16] also has a small sector erase capability which ma[512Kx8/256Kx16]es the device ideal for storing parameters or data that have fewer rewrite cycles and conventional EEPROMs cannot handle due to insufficient capacity.<[512Kx8/256Kx16]p>

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DESCRIPTION:
Ma[512Kx8/256Kx16]well Technologies’ [512Kx8/256Kx16]9F040[512Kx8/256Kx16] high-performance FLASH MEMORY. The [512Kx8/256Kx16]9F040[512Kx8/256Kx16] is a 4M (4,[512Kx8/256Kx16]94,304) [512Kx8/256Kx16] [512Kx8/256Kx16]-bit NAND FLASH MEMORY with a spare [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] ([512Kx8/256Kx16]3[512Kx8/256Kx16],07[512Kx8/256Kx16]) [512Kx8/256Kx16] [512Kx8/256Kx16]-bit.
   
FEATURES:
• Single [512Kx8/256Kx16].0 V supply
• E[512Kx8/256Kx16]cellent Single Event Effect
    · - SEL
        TH: > [512Kx8/256Kx16]0 MeV[512Kx8/256Kx16]mg[512Kx8/256Kx16]cm[512Kx8/256Kx16]
    · - SEU
        TH: = 37 MeV[512Kx8/256Kx16]mg[512Kx8/256Kx16]cm[512Kx8/256Kx16]
    - SEU saturated cross section: [512Kx8/256Kx16]E-[512Kx8/256Kx16] cm[512Kx8/256Kx16][512Kx8/256Kx16]bit
• Organization:
    - MEMORY cell array: (4M + [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]) bit [512Kx8/256Kx16] [512Kx8/256Kx16]bit
    - Data register: ([512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] + [512Kx8/256Kx16][512Kx8/256Kx16]) bit [512Kx8/256Kx16] [512Kx8/256Kx16]bit
• Automatic program and erase
    - Page program: ([512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] + [512Kx8/256Kx16][512Kx8/256Kx16]) Byte
    - Bloc[512Kx8/256Kx16] erase: ([512Kx8/256Kx16][512Kx8/256Kx16] + [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]) Byte
    - Status register
• [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]-Byte page read operation
    - Random access: [512Kx8/256Kx16]0 µ s (ma[512Kx8/256Kx16])
    - Serial page access: [512Kx8/256Kx16]0 ns (min)
• Fast write cycle time
    - Program time: [512Kx8/256Kx16][512Kx8/256Kx16]0 µ s (typ)
    - Bloc[512Kx8/256Kx16] erase time: [512Kx8/256Kx16] ms (typ)
• Command[512Kx8/256Kx16]address[512Kx8/256Kx16]data multiple[512Kx8/256Kx16]ed I[512Kx8/256Kx16]O port
• Hardware data protection
    - Program[512Kx8/256Kx16]erase loc[512Kx8/256Kx16]out during power transitions
• Reliable CMOS floating-gate technology
    - Endurance: [512Kx8/256Kx16],000,000 program[512Kx8/256Kx16]erase cycles
    - Data retention: [512Kx8/256Kx16]0 years
• Command register operation
• 44 pin flat pac[512Kx8/256Kx16]age
   
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GENERAL DESCRIPTION
[512Kx8/256Kx16]>
The M[512Kx8/256Kx16][512Kx8/256Kx16]9F400C T[512Kx8/256Kx16]B is a 4-mega bit FLASH MEMORY or ganized as [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] bytes of [512Kx8/256Kx16] bits or [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] words of [512Kx8/256Kx16][512Kx8/256Kx16] bits. M[512Kx8/256Kx16]IC's FLASH memories offer the most cost-effective and reliable read[512Kx8/256Kx16]write non-volatile random access MEMORY.
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The M[512Kx8/256Kx16][512Kx8/256Kx16]9F400C T[512Kx8/256Kx16]B is pac[512Kx8/256Kx16]aged in 44-pin SOP, 4[512Kx8/256Kx16]-pin TSOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.
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The standard M[512Kx8/256Kx16][512Kx8/256Kx16]9F400C T[512Kx8/256Kx16]B offers access time as fast as [512Kx8/256Kx16][512Kx8/256Kx16]ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus conten tion, the M[512Kx8/256Kx16][512Kx8/256Kx16]9F400C T[512Kx8/256Kx16]B has separate chip enable (CE#) and output enable (OE#) controls.<[512Kx8/256Kx16]p>

FLASH MEMORY 3[512Kx8/256Kx16]M ([512Kx8/256Kx16]M × [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]4M × [512Kx8/256Kx16])<[512Kx8/256Kx16]p>

DESCRIPTION
The MITSUBISHI M[512Kx8/256Kx16]MGB[512Kx8/256Kx16]T[512Kx8/256Kx16][512Kx8/256Kx16]0S4BVP is a Stac[512Kx8/256Kx16]ed Multi Chip Pac[512Kx8/256Kx16]age (S-MCP) that contents [512Kx8/256Kx16][512Kx8/256Kx16]M-bits FLASH MEMORY and 4M-BIT<[512Kx8/256Kx16]font>s Static RAM in a 4[512Kx8/256Kx16]-pin TSOP (TYPE-I).
[512Kx8/256Kx16][512Kx8/256Kx16]M-bits FLASH MEMORY is a [512Kx8/256Kx16]097[512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] bytes [512Kx8/256Kx16][512Kx8/256Kx16]04[512Kx8/256Kx16][512Kx8/256Kx16]7[512Kx8/256Kx16] words, 3.3V-only, and high performance non-volatile MEMORY fabricated by CMOS technology for the peripheral circuit and DINOR(DIvided bit-line NOR) architecture for the MEMORY cell.
4M-BIT<[512Kx8/256Kx16]font>s SRAM is a [512Kx8/256Kx16][512Kx8/256Kx16]4[512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]bytes [512Kx8/256Kx16] [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]44words unsynchronous SRAM fabricated by silicon-gate CMOS technology.
M[512Kx8/256Kx16]MGB[512Kx8/256Kx16]T[512Kx8/256Kx16][512Kx8/256Kx16]0S4BVP is suitable for the application of the mobile-communication-system to reduce both the mount space and weight .<[512Kx8/256Kx16]p>

FEATURES
• Access time                                        
   FLASH MEMORY            90ns (Ma[512Kx8/256Kx16].)
   SRAM                        [512Kx8/256Kx16][512Kx8/256Kx16]ns (Ma[512Kx8/256Kx16].)
• Supply voltage           Vcc=[512Kx8/256Kx16].7 ~ 3.[512Kx8/256Kx16]V
• Ambient temperature                     
   W version                  Ta=-[512Kx8/256Kx16]0 ~ [512Kx8/256Kx16][512Kx8/256Kx16]°C
• Pac[512Kx8/256Kx16]age : 4[512Kx8/256Kx16]-pin TSOP (Type-I) , 0.4mm lead pitch<[512Kx8/256Kx16]p>

APPLICATION
  Mobile communication  products<[512Kx8/256Kx16]p>

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The W[512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]0AL ([512Kx8/256Kx16]M-bit), W[512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]0AL ([512Kx8/256Kx16]M-bit), W[512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]40AL (4M-BIT<[512Kx8/256Kx16]font>) and W[512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16]0AL ([512Kx8/256Kx16]M-bit) Serial FLASH memories provide a storage solution for systems with limited space, pins and power. The [512Kx8/256Kx16][512Kx8/256Kx16][512Kx8/256Kx16] series offers fle[512Kx8/256Kx16]ibility and performance well beyond ordinary Serial FLASH devices. They are ideal for code download applications as well as storing voice, te[512Kx8/256Kx16]t and data. The devices operate on a single [512Kx8/256Kx16].3V to 3.[512Kx8/256Kx16]V power supply with current consumption as low as [512Kx8/256Kx16]mA active and [512Kx8/256Kx16]µA for power-down.
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All devices are offered inspace-saving pac[512Kx8/256Kx16]ages. <[512Kx8/256Kx16]p>

[512Kx8/256Kx16][512Kx8/256Kx16]www.datasheetq.com[512Kx8/256Kx16]contents-image[512Kx8/256Kx16][512Kx8/256Kx16]Winbond[512Kx8/256Kx16][512Kx8/256Kx16]9[512Kx8/256Kx16][512Kx8/256Kx16]9[512Kx8/256Kx16]-DI[512Kx8/256Kx16].gif" [512Kx8/256Kx16]><[512Kx8/256Kx16]p>

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