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Description : 8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash

General description
The P89LPC970/971/972 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC970/971/972 in order to reduce component count, board space, and system cost.

Features and benefits

Principal features
■ 2 kB/4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory.
■ Two analog comparators with selectable inputs and reference source.
■ Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
■ A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.
■ Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port.
■ SPI communication port (pin remap).
■ High-accuracy internal RC oscillator option 7.373 MHz calibrated to ±1 %, with clock doubler option, allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.
■ Watchdog timer with separate on-chip oscillator, nominal 400 kHz/25 kHz, calibrated to ±10 % at 400 kHz, requiring no external components. The watchdog prescaler is selectable from eight values.
■ Pin remap for UART, I2C-bus and SPI.
■ 2.4 V to 5.5 V VDD operating range.
■ Enhanced low voltage (brownout) detect allows a graceful system shutdown when power fails.
■ 20-pin TSSOP and DIP packages with 15 I/O pins minimum and up to 18 I/O pins while using on-chip oscillator and reset options.
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Description : 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

General description
The P89LPC933/934/935/936 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC933/934/935/936 in order to reduce component count, board space, and system cost.

Features
Principal features
■ 4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB/2 kB sectors
   and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile
   data storage.
■ 256-byte RAM data memory. Both the P89LPC935 and P89LPC936 also include a
   512-byte auxiliary on-chip RAM.
■ 512-byte customer data EEPROM on chip allows serialization of devices, storage of
   setup parameters, etc. (P89LPC935/936).
■ Dual 4-input multiplexed 8-bit A/D converters/DAC outputs (P89LPC935/936, single
   A/D on P89LPC933/934).Two analog comparators with selectable inputs and
   reference source.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
   overflow or to become a PWM output) and a 23-bit system timer that can also be used
   as an RTC.
■ Enhanced UART with fractional baud rate generator, break detect, framing error
   detection, and automatic address detection; 400 kHz byte-wide I2C-bus
   communication port and SPI communication port.
■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare
   functions (P89LPC935/936).
■ High-accuracy internal RC oscillator option allows operation without external oscillator
   components.The RC oscillator option is selectable and fine tunable.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
   driven to 5.5 V).
■ 28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26
   I/O pins while using on-chip oscillator and reset options.
  
Additional features
■ A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
   for all instructions except multiply and divide when executing at 18 MHz. This is six
   times the performance of the standard 80C51 running at the same clock frequency. A
   lower clock frequency for the same performance results in power savings and reduced
   EMI.
■ Serial flash In-Circuit Programming (ICP) allows simple production coding with
   commercial EPROM programmers. Flash security bits prevent reading of sensitive
   application programs.
■ Serial flash In-System Programming (ISP) allows coding while the device is mounted
   in the end application.
■ In-Application Programming (IAP) of the flash code memory. This allows changing the
   code in a running application.
■ Watchdog timer with separate on-chip oscillator, requiring no external components.
   The watchdog prescaler is selectable from eight values.
■ Low voltage reset (brownout detect) allows a graceful system shutdown when power
   fails. May optionally be configured as an interrupt.
■ Idle and two different power-down reduced power modes. Improved wake-up from
   Power-down mode (a LOW interrupt input starts execution). Typical power-down
   current is 1 µA (total power-down with voltage comparators disabled).
■ Active-LOW reset. On-chip power-on reset allows operation without external reset
   components. A reset counter and reset glitch suppression circuitry prevent spurious
   and incomplete resets. A software reset function is also available.
■ Configurable on-chip oscillator with frequency range options selected by user
   programmed flash configuration bits. Oscillator options support frequencies from
   20 kHz to the maximum operating frequency of 18 MHz.
■ Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
   allowing it to perform an oscillator fail detect function.
■ Programmable port output configuration options: quasi-bidirectional, open drain,
   push-pull, input-only.
■ Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
   the pins match or do not match a programmable pattern.
■ LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
   entire chip.
■ Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
   minimum ramp times.
■ Only power and ground connections are required to operate the
   P89LPC933/934/935/936 when internal reset option is selected.
■ Four interrupt priority levels.
■ Eight keypad interrupt inputs, plus two additional external interrupt inputs.
■ Schmitt trigger port inputs.
■ Second data pointer.
■ Emulation support.

Description : 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

General description
The P89LPC933/934/935/936 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC933/934/935/936 in order to reduce component count, board space, and system cost.

Features and benefits
Principal features
■ 4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB/2 kB sectors
   and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile
   data storage.
■ 256-byte RAM data memory. Both the P89LPC935 and P89LPC936 also include a
   512-byte auxiliary on-chip RAM.
■ 512-byte customer data EEPROM on chip allows serialization of devices, storage of
   setup parameters, etc. (P89LPC935/936).
■ Dual 4-input multiplexed 8-bit A/D converters/DAC outputs (P89LPC935/936, single
   A/D on P89LPC933/934).Two analog comparators with selectable inputs and
   reference source.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
   overflow or to become a PWM output) and a 23-bit system timer that can also be used
   as an RTC.
■ Enhanced UART with fractional baud rate generator, break detect, framing error
   detection, and automatic address detection; 400 kHz byte-wide I2C-bus
   communication port and SPI communication port.
■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare
   functions (P89LPC935/936).
■ High-accuracy internal RC oscillator option allows operation without external oscillator
   components. The RC oscillator option is selectable and fine tunable.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
   driven to 5.5 V).
■ 28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26
   I/O pins while using on-chip oscillator and reset options.

Additional features
■ A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
   for all instructions except multiply and divide when executing at 18 MHz. This is six
   times the performance of the standard 80C51 running at the same clock frequency. A
   lower clock frequency for the same performance results in power savings and reduced
   EMI.
■ Serial flash In-Circuit Programming (ICP) allows simple production coding with
   commercial EPROM programmers. Flash security bits prevent reading of sensitive
   application programs.
■ Serial flash In-System Programming (ISP) allows coding while the device is mounted
   in the end application.
■ In-Application Programming (IAP) of the flash code memory. This allows changing the
   code in a running application.
■ Watchdog timer with separate on-chip oscillator, requiring no external components.
   The watchdog prescaler is selectable from eight values.
■ Low voltage reset (brownout detect) allows a graceful system shutdown when power
   fails. May optionally be configured as an interrupt.
■ Idle and two different power-down reduced power modes. Improved wake-up from
   Power-down mode (a LOW interrupt input starts execution). Typical power-down
   current is 1 μA (total power-down with voltage comparators disabled).
■ Active-LOW reset. On-chip power-on reset allows operation without external reset
   components. A reset counter and reset glitch suppression circuitry prevent spurious
   and incomplete resets. A software reset function is also available.
■ Configurable on-chip oscillator with frequency range options selected by user
   programmed flash configuration bits. Oscillator options support frequencies from
   20 kHz to the maximum operating frequency of 18 MHz.
■ Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
   allowing it to perform an oscillator fail detect function.
■ Programmable port output configuration options: quasi-bidirectional, open drain,
   push-pull, input-only.
■ Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
   the pins match or do not match a programmable pattern.
■ LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
   entire chip.
■ Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
   minimum ramp times.
■ Only power and ground connections are required to operate the
   P89LPC933/934/935/936 when internal reset option is selected.
■ Four interrupt priority levels.
■ Eight keypad interrupt inputs, plus two additional external interrupt inputs.
■ Schmitt trigger port inputs.
■ Second data pointer.
■ Emulation support.

Description : 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash

General description
The P89LPC9301/931A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9301/931A1 in order to reduce component count, board space, and system cost.

Features
Principal features
■ 4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory.
■ Two analog comparators with selectable inputs and reference source.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
■ A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.
■ Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
■ Enhanced low voltage (brownout) detect allows a graceful system shutdown when power fails.
■ 28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

Philips
Philips Electronics
Description : 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

General description
The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC932A1 in order to reduce component count, board space, and system cost.

Features
Principal features
■ 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory, 512-byte auxiliary on-chip RAM.
■ 512-byte customer data EEPROM on chip allows serialization of devices, storage of set-up parameters, etc.
■ Two analog comparators with selectable inputs and reference source.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output) and a 23-bit system timer that can also be used as a RTC.
■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.
■ CCU provides PWM, input capture, and output compare functions.
■ High-accuracy internal RC oscillator option allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
■ 28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

NXP
NXP Semiconductors.
Description : 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

General description
The P89LPC9321 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9321 in order to reduce component count, board space, and system cost.

Features
Principal features
■ 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.
   Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.
■ 512-byte customer data EEPROM on-chip allows serialization of devices, storage of setup parameters, etc.
■ Two analog comparators with selectable inputs and reference source.
■ Single Programmable Gain Amplifier (PGA) with selectable gains of 2x, 4x, 8x, or 16x can be applied to analog comparator inputs.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
■ A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.
■ Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.
■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare functions.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
■ 4-level low voltage (brownout) detect allows a graceful system shutdown when power fails. May optionally be configured as an interrupt.
■ 28-pin TSSOP, PLCC and DIP packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

Description : 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

General description
The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC932A1 in order to reduce component count, board space, and system cost.

Features
Principal features
■ 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory, 512-byte auxiliary on-chip RAM.
■ 512-byte customer data EEPROM on chip allows serialization of devices, storage of set-up parameters, etc.
■ Two analog comparators with selectable inputs and reference source.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output) and a 23-bit system timer that can also be used as a RTC.
■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.
■ CCU provides PWM, input capture, and output compare functions.
■ High-accuracy internal RC oscillator option allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
■ 28-pin TSSOP, PLCC, HVQFN, and DIP packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

Description : 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC

General description
The P89LPC980/982/983/985 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC980/982/983/985 in order to reduce component count, board space, and system cost.

Features and benefits
Principal features
■ 4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory. Both the P89LPC982 and the P89LPC985 also include a 256-byte auxiliary on-chip RAM.
■ 8-input multiplexed 10-bit ADC (P89LPC985, 4-input multiplexed 10-bit ADC on P89LPC983) with window comparator that can generate an interrupt for in or out of range results. Two analog comparators with selectable inputs and reference source.
■ Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
■ A 23-bit system timer that can also be used as a real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.
■ Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.
■ High-accuracy internal RC oscillator option 7.373 MHz calibrated to ±1 %, with clock doubler option, allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.
■ Watchdog timer with separate on-chip oscillator, nominal 400 kHz/25 kHz, calibrated to ±10 % at 400 kHz, requiring no external components. The watchdog prescaler is selectable from eight values.
■ Pin remap for UART, I2C-bus and SPI.
■ 2.4 V to 5.5 V VDD operating range.
■ Enhanced low voltage (brownout) detect allows a graceful system shutdown when power fails.
■ 28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

Additional features
■ A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI.
■ Serial flash In-Circuit Programming (ICP) allows simple production coding with commercial EPROM programmers. Flash security bits prevent reading of sensitive application programs.
■ Serial flash In-System Programming (ISP) allows coding while the device is mounted in the end application.
■ In-Application Programming (IAP) of the flash code memory. This allows changing the code in a running application.
■ Clock switching on the fly among internal RC oscillator, watchdog oscillator, external clock source provides optimal support of minimal power active mode with fast switching to maximum performance.
■ Idle and two different power-down reduced power modes. Improved wake-up from Power-down mode (a LOW interrupt input starts execution). Typical power-down current is 1 μA (total power-down with voltage comparators disabled).
■ Integrated PMU (Power Management Unit) automatically adjusts internal regulators to minimize power consumption during Idle mode, Power-down mode and Total power-down mode. In addition, the power consumption can be further reduced in Normal or Idle mode through configuring regulators modes according to the applications.
■ Active-LOW reset. On-chip power-on reset allows operation without external reset components. A software reset function is also available.
■ Configurable on-chip oscillator with frequency range options selected by user programmed flash configuration bits. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 18 MHz.
■ Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator allowing it to perform an oscillator fail detect function.
■ Programmable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only.
■ High current sourcing/sinking (20 mA) on eight I/O pins (P0.3 to P0.7, P1.4, P1.6, P1.7). All other port pins have high sinking capability (20 mA). A maximum limit is specified for the entire chip.
■ Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of the pins match or do not match a programmable pattern.
■ Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times.
■ Only power and ground connections are required to operate the P89LPC980/982/983/985 when internal reset option is selected.
■ Four interrupt priority levels.
■ Eight keypad interrupt inputs, plus two additional external interrupt inputs.
■ Schmitt trigger port inputs.
■ Second data pointer.
■ Emulation support

Description : 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

General description
The P89LPC9351 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9351 in order to reduce component count, board space, and system cost.

Features
Principal features
■ 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
■ 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.
■ 512-byte customer data EEPROM on-chip allows serialization of devices, storage of setup parameters, etc.
■ Dual 4-input multiplexed 8-bit ADC/DAC outputs. Two analog comparators with selectable inputs and reference source.
■ Dual Programmable Gain Amplifiers (PGA) with selectable gains of 2x, 4x, 8x, or 16x can be applied to ADCs and analog comparator inputs.
■ On-chip temperature sensor integrated with ADC module.
■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
■ A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.
■ Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.
■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare functions.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
■ 4-level low voltage (brownout) detect allows a graceful system shutdown when power fails.
■ 28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

Philips
Philips Electronics
Description : 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter

General description

The P89LPC924/925 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC924/925 is based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC924/925 in order to reduce component count, board space, and system cost.



Features

Principal features

■ 4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size, and single byte erase.

■ 256-byte RAM data memory.

■ Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon timer overflow or to become a PWM output.

■ Real-Time clock that can also be used as a system timer.

■ 4-input 8-bit multiplexed A/D converter/single DAC output. Two analog comparators with selectable inputs and reference source.

■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities.

■ 400 kHz byte-wide I2C-bus communication port.

■ Configurable on-chip oscillator with frequency range and RC oscillator options (selected by user programmed Flash configuration bits). The RC oscillator option allows operation without external oscillator components. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 12 MHz. The RC oscillator option is selectable and fine tunable.

■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).

■ 15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset options.



Additional features

■ 20-pin TSSOP package.


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