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Part Name(s) : MC74F803 MC74F803D MC74F803J MC74F803N Motorola
Motorola => Freescale
Description : CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS View

CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS



The MC74F803 is a high-speed, low-power, QUAD D-TYPE FLIP-FLOP featuring separate D-TYPE inputs, and inverting outputs WITH closely MATCHED PROPAGATION DELAYS. WITH a buffered CLOCK (CP) input that is common to all FLIP-FLOPs, the F803 is useful in high-frequency systems as a CLOCK DRIVER, providing multiple outputs that are synchronous. Because of the MATCHED PROPAGATION DELAYS, the duty cycles of the output waveforms in a CLOCK DRIVER application are symmetrical WITHin 1.0 to 1.5 nanoseconds.



• Edge-Triggered D-TYPE Inputs

• Buffered Positive Edge-Triggered CLOCK

MATCHED Outputs for Synchronous CLOCK DRIVER Applications

• Outputs Guaranteed for Simultaneous Switching


Part Name(s) : MC74F1803 MC74F1803D MC74F1803N Motorola
Motorola => Freescale
Description : CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS View

CLOCK DRIVER

QUAD D-TYPE FLIP-FLOP

WITH MATCHED PROPAGATION DELAYS



The MC74F1803 is a high–speed, low–power, QUAD D–type flip–flop featuring separate D–type inputs and inverting outputs WITH closely MATCHED PROPAGATION DELAYS. WITH a buffered CLOCK (CP) input that is common to all flip–flops, the MC74F1803 is useful in high–frequency systems as a CLOCK DRIVER, providing multiple outputs that are synchronous. Because of the MATCHED PROPAGATION DELAYS, the duty cycles of the output waveforms in a

CLOCK DRIVER application are symmetrical WITHin 2.0 nanoseconds.



• Edge–Triggered D–Type Inputs

• Buffered Positive Edge–Triggered CLOCK

MATCHED Outputs for Synchronous CLOCK DRIVER Applications

• Outputs Guaranteed for Simultaneous Switching


Part Name(s) : 74AC175CW 74ACT175CW 74ACT175PC Fairchild
Fairchild Semiconductor
Description : QUAD D-TYPE FLIP-FLOP View

The 74AC175/74ACT175 (AC/ACT175) is a high-speed QUAD D-TYPE FLIP-FLOP.



The device is useful for general FLIP-FLOP requirements where CLOCK and clear inputs are common. The information on the D-TYPE inputs is stored during the LOW-to HIGH CLOCK transition. Both true and complemented outputs of each FLIP-FLOP are provided. A Master Reset input resets all FLIP-FLOPs, independent of the CLOCK or D-TYPE inputs, when LOW.




Part Name(s) : HD74AC175 Hitachi
Hitachi -> Renesas Electronics
Description : QUAD D-TYPE FLIP-FLOP View

Description
The HD74AC175 is a high-speed QUAD D FLIP-FLOP. The device is useful for general FLIP-FLOP requirements where CLOCK and clear inputs are common. The information on the D inputs is stored during the Low-to-High CLOCK transition. Both true and complemented outputs of each FLIP-FLOP are provided. A Master Reset input resets all FLIP-FLOPs, independent of the CLOCK or D inputs, when Low.

Features
• Edge-Triggered D-TYPE Inputs
• Buffered Positive Edge-Triggered CLOCK
• Asynchronous Common Reset
• True and Complement Output
• Outputs Source/Sink 24 mA


Part Name(s) : HD74AC175 HD74AC175AFPEL HD74AC175ARPEL HD74AC175TELL Renesas
Renesas Electronics
Description : QUAD D-TYPE FLIP-FLOP View

Description
The HD74AC175 is a high-speed QUAD D FLIP-FLOP. The device is useful for general FLIP-FLOP requirements where CLOCK and clear inputs are common. The information on the D inputs is stored during the Low-to-High CLOCK transition. Both true and complemented outputs of each FLIP-FLOP are provided. A Master Reset input resets all FLIP-FLOPs, independent of the CLOCK or D inputs, when Low.

Features
• Edge-Triggered D-TYPE Inputs
• Buffered Positive Edge-Triggered CLOCK
• Asynchronous Common Reset
• True and Complement Output
• Outputs Source/Sink 24 mA

Part Name(s) : CD40174BC CD40174BCM CD40175BCM CD40175BCN MC14174B MC14175B MM74C175 CD40174BCMX CD40174BCN CD40175BC Fairchild
Fairchild Semiconductor
Description : Hex D-TYPE FLIP-FLOP QUAD D-TYPE FLIP-FLOP View

General Description
The CD40174BC consists of six positive-edge triggered D type FLIP-FLOPs; the true outputs from each FLIP-FLOP are externally available. The CD40175BC consists of four positive edge triggered D-TYPE FLIP-FLOPs; both the true and comple ment outputs from each FLIP-FLOP are externally available.
All FLIP-FLOPs are controlled by a common CLOCK and a common clear. Information at the D inputs meeting the set-up time requirements is transferred to the Q outputs on the positive-going edge of the CLOCK pulse. The clearing operation, enabled by a negative pulse at Clear input, clears all
Q outputs to logical “0” and Qs (CD40175BC only) to logical “1”. All inputs are protected from static discharge by diode clamps to VDDand VSS.

Features
■ Wide supply voltage range: 3V to 15V
■ High noise immunity: 0.45 VDD(typ.)
■ Low power TTL compatibility: fan out of 2 driving 74L or 1 driving 74 LS
■ Equivalent to MC14174B, MC14175B
■ Equivalent to MM74C174, MM74C175

Part Name(s) : 74AC175 74AC175MTC 74AC175SC 74AC175SJ 74ACT175 74ACT175MTC 74ACT175SC 74ACT175SJ 74AC175SCX 74AC175SJX Fairchild
Fairchild Semiconductor
Description : QUAD D-TYPE FLIP-FLOP View

General Description
The AC/ACT175 is a high-speed QUAD D-TYPE FLIP-FLOP. The device is useful for general FLIP-FLOP requirements where CLOCK and clear inputs are common. The information on the D-TYPE inputs is stored during the LOW-to HIGH CLOCK transition. Both true and complemented outputs of each FLIP-FLOP are provided. A Master Reset input resets all FLIP-FLOPs, independent of the CLOCK or D-TYPE inputs, when LOW.

Features
■ ICC reduced by 50%
■ Edge-triggered D-TYPE inputs
■ Buffered positive edge-triggered CLOCK
■ Asynchronous common reset
■ True and complement output
■ Outputs source/sink 24mA
■ ACT175 has TTL-compatible inputs

Part Name(s) : MC14175BCP MC14175BD MC14175BDR2 MC14175BFEL ON-Semiconductor
ON Semiconductor
Description : QUAD Type D Flip−Flop View

QUAD Type D Flip−Flop

The MC14175B QUAD type D flip−flop is constructed WITH MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each of the four flip−flops is positive−edge triggered by a common CLOCK input (C). An active−low reset input (R) asynchronously resets all flip−flops.



Features

•Complementary Outputs

•Static Operation

•All Inputs and Outputs Buffered

•Diode Protection on All Inputs

•Supply Voltage Range = 3.0 Vdc to 18 Vdc

•Output Compatible WITH Two Low−Power TTL Loads or One Low−Power Schottky TTL Load

•Functional Equivalent to TTL 74175

•Pb−Free Packages are Available*


Part Name(s) : SN54LS175 SN54LS175J SN74LS175 SN74LS175D SN74LS175N 54LS175 74LS175 Motorola
Motorola => Freescale
Description : QUAD D FLIP-FLOP View

The LSTTL /MSI SN54 /74LS175 is a high speed QUAD D FLIP-FLOP. The device is useful for general FLIP-FLOP requirements where CLOCK and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH CLOCK transition. Both true and complemented outputs of each FLIP-FLOP are provided. A Master Reset input resets all FLIP-FLOPs, independent of the CLOCK or D inputs, when LOW.
The LS175 is fabricated WITH the Schottky barrier diode process for high speed and is completely compatible WITH all Motorola TTL families.

• Edge-Triggered D-TYPE Inputs
• Buffered-Positive Edge-Triggered CLOCK
CLOCK to Output DELAYS of 30 ns
• Asynchronous Common Reset
• True and Complement Output
• Input Clamp Diodes Limit High Speed Termination Effects

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