The MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. Devices in the Motorola H600 translator series utilize the 28–lead PLCC for optimal power pinning, signal flow through and electrical performance. The single supply H646 is similar to the H643, which is a dual supply 1:8 version of the same function.
• PECL/TTL–TTL Version of Popular ECLinPS E111 • Low Skew • Guaranteed Skew Spec • Tri–State Enable • Differential Internal Design • VBB Output • Single Supply • Extra TTL and ECL Power/Ground Pins • Matched High and Low Output Impedance • Meets Specifications Required to Drive the Pentium Microprocessor
TTL to Differential PECL/Differential PECL to TTL Translator
The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual translation design of the ELT28 makes it ideal for applications which are sending and receiving signals across a backplane. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT28 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels.
• 3.5ns Typical PECL to TTL Propagation Delay • 1.2ns Typical TTL to PECL Propagation Delay • Differential PECL Inputs/Ouputs • Small Outline SOIC Package • PNP TTL Inputs for Minimal Loading • 24mA TTL Outputs • Flow Through Pinouts
Description The MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. Devices in the ON Semiconductor H646 translator series utilize the 28−lead PLCC for optimal power pinning, signal flow through and electrical performance. The single supply H646 is similar to the H643, which is a dual supply 1:8 version of the same function.
Features • PECL/TTL−TTL Version of Popular ECLinPS™ E111 • Low Skew • Guaranteed Skew Spec • Tri−State Enable • Differential Internal Design • VBB Output • Single Supply • Extra TTL and ECL Power/Ground Pins • Matched High and Low Output Impedance • Meets Specifications Required to Drive Intel® Pentium® Microprocessors • Pb−Free Packages are Available*
General Description The MM74C901 and MM74C902 hex buffers employ complementary MOS to achieve wide supply operating range, low power consumption, and high noise immunity. These buffers provide direct interface from PMOS into CMOS or TTL and direct interface from CMOS to TTL or CMOS operating at a reduced VCC supply.
Features ■ Wide supply voltage range: 3.0V to 15V ■ Guaranteed noise margin: 1.0V ■ High noise immunity: 0.45 VCC (typ.) ■ TTL compatibility: Fan out of 2 driving standard TTL
DESCRIPTION The SY10/100ELT28 is a differential PECL-to-TTL translator and a TTL-to-differential PECL translator in a single package. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-pin package and the dual translation design of the ELT28 makes it ideal for applications which are sending and receiving signals across a backplane.
FEATURES ■ Guaranteed AC parameters over temperature: • fMAX > 160MHz (TTL) • < 5.5ns PECL-to-TTL propagation delay • < 1.5ns tr / tf; PECL output • < 1.3ns TTL-to-PECL propagation delay ■ Wide temperature range: –40°C to +85°C ■ 5V power supply ■ QTTL output will default low with inputs left open or < 1.3V ■ QECL output will default high with inputs left open ■ Internal PECL input pulldown resistors ■ Available in 8-pin MSOP and SOIC packages
DESCRIPTION The SY10/100H600 are 9-bit, dual supply TTL-to-ECL translators. Devices in the Micrel-Synergy 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The H600 features both ECL and TTL logic enable controls for maximum flexibility. The 10H version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels.
FEATURES ■ 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs ■ Dual supply ■ 3.5ns max. D to Q ■ PNP TTL inputs for low loading ■ Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx) ■ Fully compatible with Motorola MC10H/100H600 ■ Available in 28-pin PLCC package
DESCRIPTION The SY10/100H646L are single supply, low skew translating 1:8 clock drivers. Devices in the MicrelSynergy H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The single supply H646L is similar to the HA643 which is a dual supply 1:8 version of the same function.
FEATURES ■ 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification ■ Three-state enable ■ Differential internal design ■ VBB output for single-ended operation ■ Extra TTL and ECL power/ground pins ■ Choice of ECL compatibility: 10K or 100K ■ Matched high and low output impedance ■ Available in 28-pin PLCC package
Description This SPDT reflective switch offers a 2 W cw RF input power handling capability. It has a single TTL control to drive both channels. This switch has an integral TTL compatible driver. It is a proven design for harsh environments and is suitable for Airborne, Naval & Ground base applications.
Features ■ Broad Band Frequency ■ SMA Connectors ■ Hermetically Sealed Housing ■ Higher Input RF Power ■ TTL Compatible ■ Single TTL Control
The 100398 is a quad latched transceiver designed to convert TTL logic levels to differential F100K ECL logic levels and vice versa. This device was designed with the capability of driving a differential 25Ω ECL load with cutoff capability, and will sink a 64 mA TTL load. The 100398 is ideal for mixed technology applications utilizing either an ECL or TTL backplane.
The direction of translation is set by the direction control pin (DIR). The DIR pin on the 100398 accepts TTL logic levels. A TTL LOW on DIR sets up the ECL pins as inputs and TTL pins as outputs. A TTL HIGH on DIR sets up the TTL pins as inputs and ECL pins as outputs.
■ Differential ECL input/output structure
■ 64 mA FAST TTL outputs
■ 25Ω differential ECL outputs with cut-off
■ Bi-directional translation
■ 2000V ESD protection
■ Latched outputs
■ 3-STATE outputs
■ Voltage compensated operating range = −4.2V to −5.7V