DESCRIPTION The PCM510x devices are a family of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x uses the latest generation of TI’s advanced segment DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.
1FEATURES 23• Hardware Control • Analog Performance (3.3V Power Supply) – SNR: 112/106/100dB (Typical) – Dynamic Range: 112/106/100dB (Typical) – THD+N: - 93/-92/90dB @ - 1dBfs (Typical) – Full Scale Output: 2.1VRMS (Ground Center) – No DC Blocking Capacitors Required – Market leading low out of band noise. • Digital Filter Latency & Performance Select • Normal 8× Oversampling Digital Filter: – Stopband Attenuation: –60dB – Passband Ripple: ±0.02dB • Low Latency 8× Oversampling Digital Filter: – Stopband Attenuation: –52dB – Passband Ripple: ±0.0001dB • Sampling Frequency: 8kHz To 384kHz • System Clock Multiples (fSCK): 64, 128, 192, 256, 384, 512, 768, 1024, 1152, 1536, 2048, 3072 • Accepts 16-, 24-, And 32-Bit Audio Data • PCM Data Formats: I2s, Left-Justified • Intelligent Muting System, Soft Up/Down Ramp & Analog Mute For 120dB Mute SNR With Popless Operation. • Integrated Power On Reset • Integrated Negative Charge Pump • Integrated High-Performance Audio PLL With BCK Reference To Generate SCK Internally • Automatic Power-Save Mode When LRCK And BCK Are Deactivated. • Internal Pop-Free Control For Sample-Rate Changes Or Clock Halts • Single Supply Operation: – 3.3V Analog, 3.3V Digital • 3.3V Failsafe LVCMOS Digital Inputs • Small 20-pin TSSOP Package
Description: The NTE2011 through NTE2015 are high–voltage, high–current Darlington arrays in a 16–Lead DIP type package and are comprised of seven silicon NPN Darlington pairs on a common monolithic sub strate. All units have open–collector outputs and integral diodes for inductive load transient suppres sion. Peak inrush currents to 600mA (NTE2011, NTE2013, NTE2014) or 750mA (NTE2012, NTE2015) are permissible, making them ideal for driving tungstun filament lamps. The NTE2011 is a general purpose array that may be used with standard bi–polar digital logic using external current limiting, or with most PMOS or CMOS directly. This device is pinned with outputs opposite inputs to facilitate printed wiring board layouts. The NTE2012 is designed for use with 14V to 25V PMOS devices. Each input has a Zener diode and resistor in series to limit the input current to a safe value in that application. The Zener diode also gives this device excellent noise immunity.
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Description : OPTIMIZED 802.11G ROUTER WITH BROADRANGE™
OPTIMIZED 802.11G ROUTER WITH BROADRANGE™ The BCM5354 integrates a high-performance MIPS32 processor, IEEE 802.11 b/g MAC/PHY, 2.4-GHz direct conversion radio, USB 2.0 host controller, SDRAM controller, and a configurable five-port Fast Ethernet (FE) switch. The BCM5354 provides wireless LAN connectivity that supports data rates of up to 125 Mbps that is backward-compatible with standard 802.11 b/g. The BCM5354 supports a WAN connection via its configurable media interfaces. The per-port programmable four-level priority queues enable QoS (IEEE 802.1p) for guaranteed bandwidth applications, DiffServ/TOS, and L2/L3 IGMP snooping. The IEEE 802.1Q VLAN allows flexible implementation of VLAN grouping and WAN port segregation.
FEATURES • 240-MHz MIPS32® CPU core • 16-KB instruction cache, 16-KB data cache, and 1-KB pre fetch cache • Memory Management Unit (MMU) for high-level Real-Time Operating System (RTOS) support • 2.4-GHz direct conversion radio • USB 2.0 host controller • SDRAM controller • 16-bit, 120-MHz SDRAM controller • SDR and DDR support • 2 MB to 128 MB capacity • Supports serial or parallel flash • Five-port integrated 10/100BASE-TX/FX IEEE 802.3u compliant Auto-MDIX transceivers and LAN/WAN switch controller • Eight GPIOs for attachment to various external devices (example: LEDs) • One JTAG and two UART ports for debugging development and attaching Data Terminal Equipment (DTE) • 0.13 um technology
SUMMARY OF BENEFITS • The BCM5354 achieves the lowest cost and highest performance router system-on-chip (SoC) integration for residential and small office, home office (SOHO) markets • Time-to-market is significantly reduced through stable Linux® and VxWorks® kernels, board support packages (BSPs), drivers and toolchains • Turn-key software is code compatible with other AirForce™ routers and access points (APs) enabling seamless migration of proprietary features • USB host interface allows for platform expansion by end users and can support USB print server or Microsoft Windows® Connect Now functionality • Supports high-speed performance mode (HSM) of 125 Mbps that is backward–compatible with standard 802.11 b/g • BroadRange™ signal processing technology enhances receive sensitivity resulting in excellent wireless throughput and range in a home and business environment
■ DESCRIPTION The MB90860A-series is Fujitsu 16-bit general-purpose microcontroller which enhances each kind of timers and communication macros. With the new 0.35 µm CMOS technology, Fujitsu now offers 128 Kbytes on-chip FLASH ROM program memory. An internal voltage booster removes the necessity for a second programming voltage.
■ FEATURES • Clock • Built-in PLL clock frequency multiplication circuit • Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz). • Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided by two) is allowed. (devices without S-suffix only) • Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multiplied PLL clock). • 16 Mbyte CPU memory space • 24-bit internal addressing • Instruction system best suited to controller • Wide choice of data types (bit, byte, word, and long word) • Wide choice of addressing modes (23 types) • Enhanced multiply-divide instructions and RETI instructions • Enhanced high-precision computing with 32-bit accumulator • Instruction system compatible with high-level language (C language) and multitask • Employing system stack pointer • Enhanced various pointer indirect instructions • Barrel shift instructions • Increased processing speed • 4-byte instruction queue • Powerful interrupt function • Powerful 8-level, 34-condition interrupt feature • Up to 16 external interrupts are supported • Automatic data transfer function independent of CPU • Extended intelligent I/O service function (EI2OS) : up to 16 channels • DMA : up to 16 channels • Low power consumption (standby) mode • Sleep mode (a mode that halts CPU operating clock) • Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and clock timer only) • Watch mode (a mode that operates sub clock and clock timer only) • Stop mode (a mode that stops oscillation clock and sub clock) • CPU blocking operation mode • Process • CMOS technology • I/O port • General-purpose input/output port (CMOS output) - 80 ports (devices without S-suffix) - 82 ports (devices with S-suffix) • Timer • Time-base timer, clock timer, watchdog timer : 1 channel • 8/16-bit PPG timer : 8-bit X 16 channels, or 16-bit X 8 channels • 16-bit reload timer : 4 channels • 16- bit input/output timer - 16-bit free run timer : 2 channel (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7) - 16- bit input capture: (ICU) : 8 channels - 16-bit output compare : (OCU) : 8 channels • UART (LIN/SCI) : 4 channels • Equipped with full-duplex double buffer • Clock-asynchronous or clock-synchronous serial transmission is available • I2C interface* : 2 channels • Up to 400 kbit/s transfer rate • DTP/External interrupt : 16 channels, CAN wakeup : 2 channels • Module for activation of extended intelligent I/O service (EI2OS), DMA, and generation of external interrupt. • Delay interrupt generator module • Generates interrupt request for task switching. • 8/10-bit A/D converter : 24 channels • Resolution is selectable between 8-bit and 10-bit. • Activation by external trigger input is allowed. • Conversion time : 3 µs (at 24-MHz machine clock, including sampling time) • Program patch function • Address matching detection for 6 address pointers. • Internal voltage regulator • Supports 3 V MCU core, offering low EMI and low power consumption figures • Programmable input levels • Automotive/CMOS-Schmitt (initial level is Automotive in Single chip mode) • TTL level (initial level for External bus mode) • ROM security function • Protects the content of ROM (MASK ROM device only) • Flash security function • Protects the content of Flash (Flash device only) • External bus interface • Clock monitor function
Functional Description The CYP15G0101DXB single-channel HOTLink II™ transceiver is a point-to-point communications building block allowing the transfer of data over a high-speed serial link (optical fiber, balanced, and unbalanced copper transmission lines) at signaling speeds ranging from 195 to 1500 MBaud.
Features ■ Second-generation HOTLink® technology ■ Compliant to multiple standards ❐ ESCON®, DVB-ASI, fibre channel and gigabit ethernet (IEEE802.3z) ❐ CPRI™ compliant ❐ CYV15G0101DXB compliant to SMPTE 259M and SMPTE 292M ❐ 8B/10B encoded or 10-bit unencoded data ■ Single-channel transceiver operates from 195 to 1500 MBaud serial data rate ■ Selectable parity check/generate ■ Selectable input clocking options ■ Selectable output clocking options ■ MultiFrame™ Receive Framer ❐ Bit and byte alignment ❐ Comma or full K28.5 detect ❐ Single- or multi-byte framer for byte alignment ❐ Low-latency option ■ Synchronous LVTTL parallel input and parallel output interface ■ Internal phase-locked loops (PLLs) with no external PLL components ■ Dual differential PECL-compatible serial inputs ❐ Internal DC-restoration ■ Dual differential PECL-compatible serial outputs ❐ Source matched for driving 50Ωtransmission lines ❐ No external bias resistors required ❐ Signaling-rate controlled edge-rates ■ Optional elasticity buffer in receive path ■ Optional phase align buffer in transmit path ■ Compatible with ❐ Fiber-optic modules ❐ Copper cables ❐ Circuit board traces ■ JTAG boundary scan ■ Built-in self-test (BIST) for at-speed link testing ■ Per-channel link quality indicator ❐ Analog signal detect ❐ Digital signal detect ■ Low power 1.25 W at 3.3 V typical ■ Single 3.3 V supply ■ 100-ball BGA ■ Pb-free package option available ■ 0.25 µ BiCMOS technology
General Description The AOZ1033A is a high efficiency, easy to use, 3A synchronous buck regulator. The AOZ1033A works from 4.5V to 18V input voltage range, and provides up to 3A of continuous output current with an output voltage adjust able down to 0.8V. The AOZ1033A comes in a SO-8 package and is rated over a -40°C to +85°C operating ambient temperature range.
Features 4.5V to 18V operating input voltage range Synchronous Buck: 80mΩ internal high-side switch and 30mΩ internal low-side switch with integrated schottky diode High efficiency: up to 95% Internal soft start Output voltage adjustable to 0.8V 3A continuous output current Fixed 600kHz PWM operation Pulse skipping at light load for high efficiency over entire load range Cycle-by-cycle current limit Pre-bias start-up Short-circuit protection Thermal shutdown SO-8 package
Applications Point of load DC/DC converters LCD TV Set top boxes DVD/Blu-ray players/recorders Cable modems PCIe graphics cards Telecom/Networking/Datacom equipment
Description The LT®6700/LT6700HV combine two micropower, low voltage comparators with a 400mV reference in a 6-lead SOT-23 or tiny DFN package. Operating with supplies from 1.4V up to 18V, these devices draw only 6.5µA, making them ideal for low voltage system monitoring. Hysteresis is included in the comparators, easing design requirements to insure stable output operation.
Features Internal 400mV Reference Total Threshold Error: ±1.25% Max at 25°C Inputs and Outputs Operate to 36V Wide Supply Range: 1.4V to 18V Specified for –55°C to 125°C Temperature Range Low Quiescent Current: 6.5µA Typ at 5V Internal Hysteresis: 6.5mV Typ Low Input Bias Current: ±10nA Max Over-The-Top® Input also Includes Ground Open-Collector Outputs Allow Level Translation Choice of Input Polarities: LT6700-1/LT6700-2/LT6700-3/LT6700HV-1/LT6700HV-2/LT6700HV-3 Available in Low Profile (1mm) SOT-23 (ThinSOT™) and 2mm × 3mm DFN Packages
applications Battery-Powered System Monitoring Threshold Detectors Window Comparators Relay Driving Industrial Control Systems Handheld Instruments Automotive Monitor and Controls
Description The Atmel AT88SC0204CA member of the Atmel CryptoMemory® family is a high-performance secure memory providing 2Kbit of user memory with advanced security and cryptographic features built in. The user memory is divided into four 64-byte zones, each of which may be individually set with different security access rights or effectively combined together to provide space for one to four data files. The AT88SC0204CA features an enhanced command set that allows direct communication with microcontroller hardware two-wire interface thereby allowing for faster firmware development with reduced code space requirements.
Features • One of a family of devices with user memories from 1Kbit to 8Kbit • 2Kbit (256-byte) EEPROM user memory • Four 512-bit (64-byte) zones • Self-timed write cycle • Single byte or 16-byte page write mode • Programmable access rights for each zone • 2Kbit configuration zone • 37-byte OTP (One-time Programmable) area for user-defined codes • 160-byte area for user-defined keys and passwords • High security features • 64-bit mutual authentication protocol (under license of ELVA) • Cryptographic Message Authentication Codes (MAC) • Stream encryption • Four key sets for authentication and encryption • Eight sets of two 24-bit passwords • Anti-tearing function • Voltage and frequency monitors • Smart card features • ISO 7816 Class B (3V) operation • ISO 7816-3 asynchronous T=0 protocol (Gemplus® Patent) * • Multiple zones, key sets and passwords for multi-application use • Synchronous two-wire serial interface for faster device initialization * • Programmable 8-byte answer-to-reset register • ISO 7816-2 compliant modules • Embedded application features • Low voltage supply: 2.7V – 3.6V • Secure nonvolatile storage for sensitive system or user information • Two-wire serial interface (TWI, 5V compatible) • 1.0MHz compatibility for fast operation • Standard 8-lead plastic packages, green compliant (exceeds RoHS) • Same pin configuration as Atmel® AT24CXXX Serial EEPROM in SOIC and PDIP packages • High reliability • Endurance: 100,000 cycles • Data retention: 10 years • ESD protection: 2,000V min
GENERAL DESCRIPTION The EN25Q16 is a 16-Megabit (2048K-byte) Serial Flash memory, with advanced write protection mechanisms. The EN25Q16 supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O using SPI pins: Serial Clock, Chip Select, Serial DQ0(DI), DQ1(DO), DQ2(WP#) and DQ3(NC). SPI clock frequencies of up to 80MHz are supported allowing equivalent clock rates of 160MHz for Dual Output and 320MHz for Quad Output when using the Dual/Quad Output Fast Read instructions. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction.
FEATURES • Single power supply operation - Full voltage range: 2.7-3.6 volt • Serial Interface Architecture - SPI Compatible: Mode 0 and Mode 3 • 16 Mbit Serial Flash - 16 M-bit/2048 K-byte/8192 pages - 256 bytes per programmable page • Standard, Dual or Quad SPI - Standard SPI: CLK, CS#, DI, DO, WP# - Dual SPI: CLK, CS#, DQ0, DQ1, WP# - Quad SPI: CLK, CS#, DQ0, DQ1, DQ2, DQ3 • High performance - 100MHz clock rate for one data bit - 80MHz clock rate for two data bits - 80MHz clock rate for four data bits • Low power consumption - 12 mA typical active current - 1 μA typical power down current • Uniform Sector Architecture: - 512 sectors of 4-Kbyte - 32 blocks of 64-Kbyte - Any sector or block can be erased individually • Software and Hardware Write Protection: - Write Protect all or portion of memory via software - Enable/Disable protection with WP# pin • High performance program/erase speed - Page program time: 1.3ms typical - Sector erase time: 90ms typical - Block erase time 400ms typical - Chip erase time: 12 seconds typical • Lockable 128 byte OTP security sector • Minimum 100K endurance cycle • Package Options - 8 pins SOP 150mil body width - 8 pins SOP 200mil body width - 8 contact VDFN - 8 pins PDIP - All Pb-free packages are RoHS compliant • Industrial temperature Range