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Part Name(s) : 7490 74LS90 74LS90D SN74LS90 SN74LS90DR2 SN74LS90N SN74LS90D SN54LS90J ON-Semiconductor
ON Semiconductor
Description : DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER View

The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are high-speed 4-BIT ripple type COUNTERs partitioned into two sections. Each COUNTER has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or divide-by-eight (LS93) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP) to form BCD, bi-quinary, modulo-12, or modulo-16 COUNTERs. All of the COUNTERs have a 2-input gated Master Reset (Clear), and the LS90 also has a 2-input gated Master Set (Preset 9).

• Low Power Consumption . . . Typically 45 mW
• High Count Rates . . . Typically 42 MHz
• Choice of Counting Modes . . . BCD, Bi-Quinary, DIVIDE-BY-TWELVE, BINARY
• Input Clamp Diodes Limit High Speed Termination Effects

Part Name(s) : 74LS90 74LS92 74LS93 SN54LS90J SN54LS92J SN54LS93J SN74LS90N SN74LS92D SN74LS92N SN74LS93D Motorola
Motorola => Freescale
Description : DECADE COUNTER / DIVIDE-BY-TWELVE COUNTER / 4-BIT BINARY COUNTER View

The SN54/74LS90, SN54/74LS92 andSN54/74LS93 are high-speed 4-BITripple type COUNTERs partitioned intotwo sections. Each COUNTER has a divide-by-twosection andeither a divide-by-five (LS90), divide-by-six (LS92) or divide-by-eight(LS93) section which are triggered by a HIGH-to-LOW transition on the clock inputs.






1. Low Power Consumption . . . Typically 45 mW

2. High Count Rates . . . Typically 42 MHz

3. Choice of Counting Modes . . . BCD, Bi-Quinary, DIVIDE-BY-TWELVE, BINARY

4. Input Clamp Diodes Limit High Speed Termination Effects


Part Name(s) : SN54-74LS90 SN54LS90 SN54LS92 SN54LS92J SN54LS93 SN54LS93J SN74LS92 SN74LS92D SN74LS92N SN74LS93 ON-Semiconductor
ON Semiconductor
Description : DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER View

The SN54/74LS90, SN54/74LS92 and SN54/74LS93 are high-speed 4-BIT ripple type COUNTERs partitioned into two sections. Each COUNTER has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or divide-by-eight (LS93) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP) to form BCD, bi-quinary, modulo-12, or modulo-16 COUNTERs. All of the COUNTERs have a 2-input gated Master Reset (Clear), and the LS90 also has a 2-input gated Master Set (Preset 9).



• Low Power Consumption . . . Typically 45 mW

• High Count Rates . . . Typically 42 MHz

• Choice of Counting Modes . . . BCD, Bi-Quinary, DIVIDE-BY-TWELVE, BINARY

• Input Clamp Diodes Limit High Speed Termination Effects



 


Part Name(s) : MM54C90 MM54C90J MM54C93 MM54C93J MM74C90 MM74C90J MM74C93 MM74C93J MM54C90N MM54C93N TI
Texas Instruments
Description : MM54C90 MM74C90 4-BIT DECADE COUNTER MM54C93 MM74C93 4-BIT BINARY COUNTER View

General Description
The MM54C90/MM74C90 DECADE COUNTER and the MM54C93/MM74C93 BINARY COUNTER and complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. The 4-BIT DECADE COUNTER can reset to zero or preset to nine by applying appropriate logic level on the R01, R02, R91 and R92 inputs. Also, a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, 5 or 10 frequency COUNTER. The 4-BIT BINARY COUNTER can be reset to zero by applying high logic level on inputs R01 and R02, and a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, -8, or -16 divider. Counting occurs on the negative going edge of the input pulse.
All inputs are protected against static discharge damage.

Features
■ Wide supply voltage range 3V to 15V
■ Guaranteed noise margin 1V
■ High noise immunity 0.45 VCC (typ.)
■ Low power Fan out of 2
    TTL compatiblity driving 74L
■ The MM54C93/MM74C93 follows the MM54L93/MM74L93 Pinout


Part Name(s) : 74LS290 74LS293 SN54-74LS290 SN54-74LS293 SN54LS293 SN54LS293J SN74LS293 SN74LS293D SN74LS293N ON-Semiconductor
ON Semiconductor
Description : DECADE COUNTER; 4-BIT BINARY COUNTER View

DECADE COUNTER; 4-BIT BINARY COUNTER



The SN54 /74LS290 and SN54 /74LS293 are high-speed 4-BIT ripple type COUNTERs partitioned into two sections. Each COUNTER has a divide-by-two section and either a divide-by-five (LS290) or divide-by-eight (LS293) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP)to form BCD, Bi-quinary, or Modulo-16 COUNTERs. Both of the COUNTERs have a 2-input gated Master Reset (Clear), and the LS290 also has a 2-input gated Master Set (Preset 9).



• Corner Power Pin Versions of the LS90 and LS93

• Low Power Consumption . . . Typically 45 mW

• High Count Rates . . . Typically 42 MHz

• Choice of Counting Modes . . . BCD, Bi-Quinary, BINARY

• Input Clamp Diodes Limit High Speed Termination Effects


Part Name(s) : MC14569B MC14569BCL MC14569BCP MC14569BDW Motorola
Motorola => Freescale
Description : Programmable divide-by-N dual 4-BIT BINARY/BCD down COUNTER View

The MC14569B is a programmable divide–by–N dual 4–bit BINARY or BCD down COUNTER constructed with MOS P–channel and N–channel enhancement mode devices (complementary MOS) in a monolithic structure. This device has been designed for use with the MC14568B phase comparator/COUNTER in frequency synthesizers, phase–locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.



• Speed–up Circuitry for Zero Detection

• Each 4–Bit COUNTER Can Divide Independently in BCD or BINARY Mode

• Can be Cascaded With MC14568B, MC14522B or MC14526B for Frequency Synthesizer Applications

• All Outputs are Buffered

• Schmitt Triggered Clock Conditioning


Part Name(s) : 74LS90 74LS92 JM38510/31501BCA JM38510/31502BCA JM38510/31502BDA LS90 LS92 LS93 M38510/31501BCA M38510/31502BCA Texas-Instruments
Texas Instruments
Description : DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS View

description
Each of these monolithic COUNTERs contains four master-slave flip-flops and additional gating to provide a divide-by-two COUNTER and a three-stage BINARY COUNTER for which the count cycle length is divide-by-five for the 90A and LS90, divide-by-six for the 92A and LS92, and the divide-by-eight for the 93A and LS93.
All of these COUNTERs have a gated zero reset and the 90A and LS90 also have gated set-to-nine inputs for use in BCD nines complement applications.

Part Name(s) : SN54LS192 SN54LS193 SN54LS193J SN74LS193DR2 ON-Semiconductor
ON Semiconductor
Description : PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER View

PRESETTABLE BCD/DECADE UP/DOWN COUNTER
PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

The SN54/74LS192 is an UP/DOWN BCD DECADE (8421) COUNTER and the SN54/74LS193 is an UP/DOWN MODULO-16 BINARY COUNTER. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOW-to-HIGH transitions on the clock inputs.
Separate Terminal Count Up and Terminal Count Down outputs are provided which are used as the clocks for a subsequent stages without extra logic, thus simplifying multistage COUNTER designs. Individual preset inputs allow the circuits to be used as programmable COUNTERs. Both the Parallel Load (PL) and the Master Reset (MR) inputs asynchronously override the clocks.

• Low Power . . . 95 mW Typical Dissipation
• High Speed . . . 40 MHz Typical Count Frequency
• Synchronous Counting
• Asynchronous Master Reset and Parallel Load
• Individual Preset Inputs
• Cascading Circuitry Internally Provided
• Input Clamp Diodes Limit High Speed Termination Effects

Part Name(s) : MC14569B MC14569BCP MC14569BCPG MC14569BDT MC14569BDW MC14569BDWG MC14569BDWR2 MC14569BDWR2G ON-Semiconductor
ON Semiconductor
Description : Programmable Divide−By−N Dual 4−Bit BINARY/BCD Down COUNTER View

The MC14569B is a programmable divide−by−N dual 4−bit BINARY or BCD down COUNTER constructed with MOS P−Channel and N−Channel enhancement mode devices (complementary MOS) in a monolithic structure.

This device has been designed for use with the MC14568B phase comparator/COUNTER in frequency synthesizers, phase−locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.



Features

• Speed−up Circuitry for Zero Detection

• Each 4−Bit COUNTER Can Divide Independently in BCD or BINARY Mode

• Can be Cascaded With MC14526B for Frequency Synthesizer Applications

• All Outputs are Buffered

• Schmitt Triggered Clock Conditioning

• Pb−Free Packages are Available*


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