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Part Name(s) : 74LS390 74LS393 SN54/74LS390 SN54/74LS393 SN54LS390 SN54LS390J SN54LS393 SN54LS393J SN74LS390 SN74LS390D Motorola
Motorola => Freescale
Description : DUAL DECADE COUNTER; DUAL 4-STAGE BINARY COUNTER LOW POWER SCHOTTKY View

DUAL DECADE COUNTER;
DUAL 4-STAGE BINARY COUNTER

The SN54/74LS390 and SN54/74LS393 each contain a pair of high-speed 4-STAGE ripple COUNTERs. Each half of the LS390 is partitioned into a divide-by-two section and a divide-by five section, with a separate clock input for each section. The two sections can be connected to count in the 8.4.2.1 BCD code or they can count in a biquinary sequence to provide a square wave (50% duty cycle) at the final output.
Each half of the LS393 operates as a Modulo-16 BINARY divider, with the last three stages triggered in a ripple fashion. In both the LS390 and the LS393, the flip-flops are triggered by a HIGH-to-LOW transition of their CP inputs. Each half of each circuit type has a Master Reset input which responds to a HIGH signal by forcing all four outputs to the LOW state.

DUAL Versions of LS290 and LS293
• LS390 has Separate Clocks Allowing ÷2, ÷2.5, ÷5
• IndiviDUAL Asynchronous Clear for Each COUNTER
• Typical Max Count Frequency of 50 MHz
• Input Clamp Diodes Minimize High Speed Termination Effects

Part Name(s) : CD4029 CD4029BC CD4029BCN CD4029BCNX CD4029BCSJ CD4029BCSJX CD4029BCWM CD4029BCWMX Fairchild
Fairchild Semiconductor
Description : Presettable BINARY/DECADE Up/Down COUNTER View

General Description

The CD4029BC is a presettable up/down COUNTER which counts in either BINARY or DECADE mode depending on the voltage level applied at BINARY/DECADE input. When BINARY/DECADE is at logical “1”, the COUNTER counts in BINARY, other wise it counts in DECADE. Similarly, the COUNTER counts up when the up/down input is at logical “1” and vice versa.



Features

■Wide supply voltage range: 3V to 15V

■High noise immunity: 0.45 VDD(typ.)

■Low power TTL compatibility: fan out of 2 driving 74L or 1 driving 74LS

■Parallel jam inputs

BINARY or BCD DECADE up/down counting


Part Name(s) : HEF4029B HEF4029BD HEF4029BDB HEF4029BDF HEF4029BF HEF4029BN HEF4029BP HEF4029BPN HEF4029BT HEF4029BTD Philips
Philips Electronics
Description : Synchronous up/down COUNTER, BINARY/DECADE COUNTER View

DESCRIPTION

The HEF4029B is a synchronous edge-triggered up/down 4-bit BINARY/BCD DECADE COUNTER with a clock input (CP), an active LOW count enable input (CE), an up/down control input (UP/DN), a BINARY/DECADE control input (BIN/DEC), an overriding asynchronous active HIGH parallel load input (PL), four parallel data inputs (P0 to P3), four parallel buffered outputs (O0 to O3) and an active LOW terminal count output (TC).

Information on P0 to P3 is asynchronously loaded into the COUNTER while PL is HIGH, independent of CP.

The COUNTER is advanced one count on the LOW to HIGH transition of CP when CE and PL are LOW. The TC signal is normally HIGH and goes LOW when the COUNTER reaches its maximum count in the UP mode, or the minimum count in the DOWN mode provided CE is LOW.



 


Part Name(s) : SN54LS192 SN54LS193 SN54LS193J SN74LS193DR2 ON-Semiconductor
ON Semiconductor
Description : PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER View

PRESETTABLE BCD/DECADE UP/DOWN COUNTER
PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

The SN54/74LS192 is an UP/DOWN BCD DECADE (8421) COUNTER and the SN54/74LS193 is an UP/DOWN MODULO-16 BINARY COUNTER. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOW-to-HIGH transitions on the clock inputs.
Separate Terminal Count Up and Terminal Count Down outputs are provided which are used as the clocks for a subsequent stages without extra logic, thus simplifying multistage COUNTER designs. IndiviDUAL preset inputs allow the circuits to be used as programmable COUNTERs. Both the Parallel Load (PL) and the Master Reset (MR) inputs asynchronously override the clocks.

• Low Power . . . 95 mW Typical Dissipation
• High Speed . . . 40 MHz Typical Count Frequency
• Synchronous Counting
• Asynchronous Master Reset and Parallel Load
• IndiviDUAL Preset Inputs
• Cascading Circuitry Internally Provided
• Input Clamp Diodes Limit High Speed Termination Effects


Part Name(s) : SN54LSXXXJ SN74LSXXXD SN74LSXXXN Motorola
Motorola => Freescale
Description : DUAL DECADE COUNTER; DUAL 4-STAGE BINARY COUNTER View

The SN54/74LS390 and SN54/74LS393 each contain a pair of high-speed 4-STAGE ripple COUNTERs. Each half of the LS390 is partitioned into a divide-by-two section and a divide-by five section, with a separate clock input for each section. The two sections can be connected to count in the 8.4.2.1 BCD code or they can count in a biquinary sequence to provide a square wave (50% duty cycle) at the final output.

Each half of the LS393 operates as a Modulo-16 BINARY divider, with the last three stages triggered in a ripple fashion. In both the LS390 and the LS393, the flip-flops are triggered by a HIGH-to-LOW transition of their CP inputs.

Each half of each circuit type has a Master Reset input which responds to a HIGH signal by forcing all four outputs to the LOW state.



DUAL Versions of LS290 and LS293

• LS390 has Separate Clocks Allowing ÷2, ÷2.5, ÷5

• IndiviDUAL Asynchronous Clear for Each COUNTER

• Typical Max Count Frequency of 50 MHz

• Input Clamp Diodes Minimize High Speed Termination Effects



 


Part Name(s) : CD4029 CD4029BC CD4029BCJ CD4029BCN CD4029BM CD4029BMJ CD4029BMN CD4029BMW/883 National-Semiconductor
National ->Texas Instruments
Description : Presettable BINARY/DECADE Up/Down COUNTER View

General Description

The CD4029BM/CD4029BC is a presettable up/down COUNTER which counts in either BINARY or DECADE mode depending on the voltage level applied at BINARY/DECADE input. When BINARY/DECADE is at logical ``1'', the COUNTER counts in BINARY, otherwise it counts in DECADE. Similarly, the COUNTER counts up when the up/down input is at logical ``1'' and vice versa.

A logical ``1'' preset enable signal allows information at the ``jam'' inputs to preset the COUNTER to any state asynchro nously with the clock. The COUNTER is advanced one count at the positive-going edge of the clock if the carry in and preset enable inputs are at logical ``0''. Advancement is inhibited when either or both of these two inputs is at logical ``1''.

The carry out signal is normally at logical ``1'' state and goes to logical ``0'' state when the COUNTER reaches its maximum count in the ``up'' mode or the minimum count in the ``down'' mode provided the carry input is at logical ``0'' state. All inputs are protected against static discharge by diode clamps to both VDDand VSS.



Features

Wide supply voltage range 3V to 15V

High noise immunity 0.45 VDD(typ.)

Low power fan out of 2

TTL compatibility driving 74L or 1 driving 74LS YParallel jam inputs

BINARY or BCD DECADE up/down counting


Part Name(s) : MC74HC393ADT MC74HC393ADTEL ON-Semiconductor
ON Semiconductor
Description : DUAL 4-STAGE BINARY Ripple COUNTER View

DUAL 4-STAGE BINARY Ripple COUNTER High–Performance Silicon–Gate CMOS

The MC74HC393A is identical in pinout to the LS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device consists of two independent 4–bit BINARY ripple COUNTERs with parallel outputs from each COUNTER stage. A ÷ 256 COUNTER can be obtained by cascading the two BINARY COUNTERs.

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 236 FETs or 59 Equivalent Gates

Part Name(s) : MMC4029 Micro-Electronics
Micro Electronics
Description : PRESETTABLE UP / DOWN COUNTER BINARY OR BCD - DECADE View

PRESETTABLE UP / DOWN COUNTER BINARY OR BCD - DECADE

Part Name(s) : MC74HC393 MC74HC393J MC74HC393N MC74HC393D ON-Semiconductor
ON Semiconductor
Description : DUAL 4−Stage BINARY Ripple COUNTER View

DUAL 4−Stage BINARY Ripple COUNTER High−Performance Silicon−Gate CMOS

The MC54/74HC393 is identical in pinout to the LS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device consists of two independent 4−bit BINARY ripple COUNTERs with parallel outputs from each COUNTER stage. A ÷ 256 COUNTER can be obtained by cascading the two BINARY COUNTERs.

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 μA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 236 FETs or 59 Equivalent Gates

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