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System-Logic
System Logic Semiconductor
Description : 14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS

14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS

The SL4060B consists of an Oscillator section and 14 ripple-carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which resets the Counter to the all-Q’s state and disables the Oscillator. A high level on the RESET line accomplishes the reset function. All Counter stages are master-slave flip-flops. The state of the Counter is advanced one step in Binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

 • Operating Voltage Range: 3.0 to 18 V
 • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
 • Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

Integral
Integral Corp.
Description : 14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS

14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS

The IW4060B consists of an Oscillator section and 14 ripple-carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which resets the Counter to the all-Q’s state and disables the Oscillator. A high level on the RESET line accomplishes the reset function. All Counter stages are master-slave flip-flops. The state of the Counter is advanced one step in Binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

SLS
System Logic Semiconductor
Description : 14-Stage Ripple-Carry Binary Counter/Divider and Oscillator

14-Stage Ripple-Carry Binary Counter/Divider and Oscillator
High-Voltage Silicon-Gate CMOS

The SL4060B consists of an Oscillator section and 14 ripple-carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which resets the Counter to the all-Q’s state and disables the Oscillator. A high level on the RESET line accomplishes the reset function. All Counter stages are master-slave flip-flops. The state of the Counter is advanced one step in Binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

 • Operating Voltage Range: 3.0 to 18 V
 • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
 • Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

IKSEMICON
IK Semicon Co., Ltd
Description : 14-Stage Ripple-Carry Binary Counter/Divider and Oscillator

14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS

The IW4060B consists of an Oscillator section and 14 ripple-carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which resets the Counter to the all-Q’s state and disables the Oscillator. A high level on the RESET line accomplishes the reset function. All Counter stages are master-slave flip-flops. The state of the Counter is advanced one step in Binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

Part Name(s) : CD4060 CD4060BMS
Intersil
Intersil
Description : CMOS 14 Stage Ripple-Carry Binary Counter/Divider and Oscillator

Description

CD4060BMS consists of an Oscillator section and 14 ripple carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which resets the Counter to the all O’s state and disables the Oscillator. A high level on the RESET line accom plishes the reset function. All Counter stages are master slave flip-flops.



Features

• High Voltage Type (20V Rating)

• Common Reset

• 12MHz Clock Rate at 15V

• Fully Static Operation

• Buffered Inputs and Outputs

• Schmitt Trigger Input Pulse Line

• Standardized, Symmetrical Output Characteristics

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Oscillator Features

• All Active Components on Chip

• RC or Crystal Oscillator Configuration

• RC Oscillator Frequency of 690kHz Min. at 15V


Fairchild
Fairchild Semiconductor
Description : 14-Stage Binary Counter • 12-Stage Binary Counter

General Description

The MM74HC4020, MM74HC4040, are high speed Binary ripple carry Counters. These Counters are implemented utilizing advanced silicon-gate CMOS technology to achieve speed performance similar to LS-TTL Logic while retaining the low power and high noise immunity of CMOS.

The MM74HC4020 is a 14 stage Counter and the MM74HC4040 is a 12-stage Counter. Both devices are incremented on the falling edge (negative transition) of the input clock, and all their outputs are reset to a low level by applying a Logical high on their reset input.

These devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due to static discharge by protection diodes to VCC and ground.



Features

■ Typical propagation delay: 16 ns

■ Wide operating voltage range: 2–6V

■ Low input current: 1 µA maximum

■ Low quiescent current: 80 µA maximum (74HC Series)

■ Output drive capability: 10 LS-TTL loads



 


Part Name(s) : CD4060BMS
Harris
Harris Semiconductor
Description : CMOS 14 Stage Ripple-Carry Binary Counter/Divider and Oscillator

Description
CD4060BMS consists of an Oscillator section and 14 ripple carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which resets the Counter to the all O’s state and disables the Oscillator.
   
Features
• High Voltage Type (20V Rating)
• Common Reset
• 12MHz Clock Rate at 15V
• Fully Static Operation
• Buffered Inputs and Outputs
• Schmitt Trigger Input Pulse Line
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
    No. 13B, “Standard Specifications for Description of
    ‘B’ Series CMOS Devices”
   
Oscillator Features
• All Active Components on Chip
• RC or Crystal Oscillator Configuration
• RC Oscillator Frequency of 690kHz Min. at 15V
   
Applications
• Control Counters
• Timers
• Frequency Dividers
• Time Delay Circuits
   

Description : 14-Stage Binary Counter • 12-Stage Binary Counter

General Description

The MM74HC4020, MM74HC4040, are high speed Binary ripple carry Counters. These Counters are implemented utilizing advanced silicon-gate CMOS technology to achieve speed performance similar to LS-TTL Logic while retaining the low power and high noise immunity of CMOS.

The MM74HC4020 is a 14 stage Counter and the MM74HC4040 is a 12-stage Counter. Both devices are incremented on the falling edge (negative transition) of the input clock, and all their outputs are reset to a low level by applying a Logical high on their reset input.

These devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due to static discharge by protection diodes to VCC and ground.



Features

■ Typical propagation delay: 16 ns

■ Wide operating voltage range: 2–6V

■ Low input current: 1 µA maximum

■ Low quiescent current: 80 µA maximum (74HC Series)

■ Output drive capability: 10 LS-TTL loads



 


Part Name(s) : HC4060M
ST-Microelectronics
STMicroelectronics
Description : 14 STAGE Binary Counter/Oscillator

DESCRIPTION
The M54/74HC4060 is a high speed CMOS 14-Stage Binary Counter/Oscillator fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. It operates ten times faster than metal-gate C2MOS IC (4060B) with the same power dissipation.

■ HIGH SPEED fMAX = 58 MHz (TYP.) AT VCC = 5 V
■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C
■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)
■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS
■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.)
■ BALANCED PROPAGATION DELAYS tPLH = tPHL
■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V
■ PIN AND FUNCTION COMPATIBLE with 4060B

Part Name(s) : HCC4060BF HCF4060BC1
ST-Microelectronics
STMicroelectronics
Description : 14-Stage RIPPLE CARRY Binary Counter/DIVIDER AND Oscillator

DESCRIPTION
The HCC4060B (extended temperature range) and HCF4060B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in line plastic or ceramic package and plastic micropackage. The HCC/HCF4060B consist of an Oscillator section and 14 ripple carry Binary Counter stages. The Oscillator configuration allows design of either RC or crystal Oscillator circuits. A RESET input is provided which reset the Counter to the all 0’s state and disables Oscillator. A high level on the RESET line accmplishes the reset function. All Counter stages are master slave flip-flops. The state of the Counter is advanced one step in Binary order on the negative transition of φ1 (and φ0). All inputs and outputs are fully buffered. Schmitt trigger action on the clock lin permits unlimited clock rise and fall time.

■ MEDIUM-SPEED OPERATION
■ COMMON RESET
■ FULLY STATIC OPERATION
■ BUFFERED INPUTS AND OUTPUTS
■ QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
■ 5V, 10V AND 15V PARAMETRIC RATINGS
■ INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE
■ 1005 TESTED FOR QUIESCENT CURRENT
■ MEETS ALL REQUIREMENTS OF JEDECTENTATIVE STANDARD N. 13A,
   ” STANDARD SPECIFICATIONS FOR DESCRIPTION OF ’ B ’ SERIES CMOS DEVICES ”

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