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Part name(s)' : 5962-87807012A 5962-8780701RA SN54HC377 SN54HC377J SN54HC378 SN54HC379 SN74HC377 SN74HC377DW SN74HC377DWE4 SN74HC377DWG4 SN74HC377DWR SN74HC377DWRE4 SN74HC377DWRG4 SN74HC377N SN74HC377NE4 SN74HC377NSR SN74HC377NSRE4 SN74HC378 SN74HC378D SN74HC378N SN74HC378N3 SN74HC379 SN74HC379N SNJ54HC377FK SNJ54HC377J
Description : OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
TI
Texas Instruments

These circuits are positive-edge triggered D-TYPE FLIP-FLOPS WITH an ENABLE input. The 'HC377, 'HC378, AND 'HC379 devices are similar to 'HC273, 'HC174, AND 'HC175 respectively, but feature a latched clock ENABLE (G) instead of a common clear.



Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if G is low. Clock triggering occurs at a particular voltage level AND is not directly related to the transition time of the positive-going pulse. When the clock



Features

'HC377 AND 'HC378 Contain Eight AND Six FLIP-FLOPS, Respectively, WITH Single-Rail Outputs

'HC379 Contains Four FLIP-FLOPS WITH Double-Rail Outputs

Clock ENABLE Latched to Avoid False Clocking



Applications Include:

Buffer/Storage Registers


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Part name(s)' : 54LS377 54LS378 54LS379 74LS377 74LS378 74LS379 SN54LS377 SN54LS377J SN54LS378 SN54LS378J SN54LS379 SN54LS379J SN74LS377 SN74LS377D SN74LS377DW SN74LS377N SN74LS378 SN74LS378D SN74LS378DW SN74LS378N SN74LS379 SN74LS379D SN74LS379DW SN74LS379N
Description : OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE
Motorola
Motorola => Freescale

The SN54 /74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-TYPE FLIP-FLOPS WITH a buffered common clock AND a buffered common clock ENABLE. The SN54/74LS378 is a 6-Bit Register WITH a buffered common ENABLE.
This device is similar to the SN54/74LS174, but WITH common ENABLE rather than common Master Reset. The SN54/74LS379 is a 4-Bit Register WITH buffered common ENABLE.
This device is similar to the SN54/74LS175 but features the common ENABLE rather then common Master Reset.

• 8-Bit High Speed Parallel Registers
• Positive Edge-Triggered D-TYPE Flip Flops
• Fully Buffered Common Clock AND ENABLE Inputs
• True AND Complement Outputs
• Input Clamp Diodes Limit High Speed Termination Effects

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Part name(s)' : HD74LS174 HD74LS174FPEL HD74LS174P HD74LS174RPEL HD74LS175 HD74LS175FPEL HD74LS175P HD74LS175RPEL
Description : Hex / QUADruple D-TYPE FLIP-FLOPS (WITH clear)
Renesas
Renesas Electronics

Hex / QUADruple D-TYPE FLIP-FLOPS (WITH clear)



These positive-edge-triggered FLIP-FLOPS utilize TTL circuitry toimplement D-TYPE flip-flop logic. All have a direct

clear input, AND the HD74LS175 features complementary outputs from each FLIP-FLOPS. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level AND is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the outputs.



 


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Part name(s)' : HCT377 SN54HCT377 SN74HCT377 SNJ54HCT377FK SNJ54HCT377J SNJ54HCT377W SN74HCT377DW SN74HCT377DWR SN74HCT377N
Description : OCTAL D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
Texas-Instruments
Texas Instruments

description/ordering information
These devices are positive-edge-triggered D-TYPE FLIP-FLOPS. The ’HCT377 devices are similar to the ’HCT273 devices, but feature a latched clock-ENABLE (CLKEN) input instead of a common clear.
   
● Operating Voltage Range of 4.5 V to 5.5 V
● Outputs Can Drive Up To 10 LSTTL Loads
● Low Power Consumption, 80-µA Max ICC
● Typical tpd = 12 ns
● ±4-mA Output Drive at 5 V
● Low Input Current of 1 µA Max
● Inputs Are TTL-Voltage Compatible
● Contain Eight FLIP-FLOPS WITH Single-Rail
    Outputs
● Clock ENABLE Latched to Avoid False
    Clocking
● Applications Include:
    – Buffer/Storage Registers
    – Shift Registers
    – Pattern Generators
   

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Part name(s)' : 74LS174 74LS175 DM74LS174 DM74LS174M DM74LS174MX DM74LS174N DM74LS174SJ DM74LS174SJX DM74LS175 DM74LS175M DM74LS175MX DM74LS175N DM74LS175SJ DM74LS175SJX DM74LS175CW
Description : Hex/QUAD D-TYPE FLIP-FLOPS WITH Clear
Fairchild
Fairchild Semiconductor

General Description
These positive-edge-triggered FLIP-FLOPS utilize TTL circuitry to implement D-TYPE flip-flop logic. All have a direct clear input, AND the QUAD (175) versions feature complementary outputs from each flip-flop.
Information at the D inputs meeting the setup time require ments is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a partic ular voltage level AND is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output.

Features
■ DM74LS174 contains six FLIP-FLOPS WITH single-rail outputs
■ DM74LS175 contains four FLIP-FLOPS WITH double-rail outputs
■ Buffered clock AND direct clear inputs
■ Individual data input to each flip-flop
■ Applications include:
   Buffer/storage registers
   Shift registers
   Pattern generators
■ Typical clock frequency 40 MHz
■ Typical power dissipation per flip-flop 14 mW

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Part name(s)' : HCT377 SN74HCT377DW SN74HCT377DWE4 SN74HCT377DWG4 SN74HCT377DWR SN74HCT377DWRE4 SN74HCT377DWRG4 SN74HCT377N SN74HCT377NE4 SNJ54HCT377FK SNJ54HCT377J SNJ54HCT377W SN54HCT377 SN74HCT377
Description : OCTAL D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
TI
Texas Instruments

description/ordering information
These devices are positive-edge-triggered D-TYPE FLIP-FLOPS. The ’HCT377 devices are similar to the ’HCT273 devices, but feature a latched clock-ENABLE (CLKEN) input instead of a common clear.
   
● Operating Voltage Range of 4.5 V to 5.5 V
● Outputs Can Drive Up To 10 LSTTL Loads
● Low Power Consumption, 80-µA Max ICC
● Typical tpd = 12 ns
● ±4-mA Output Drive at 5 V
● Low Input Current of 1 µA Max
● Inputs Are TTL-Voltage Compatible
● Contain Eight FLIP-FLOPS WITH Single-Rail
    Outputs
● Clock ENABLE Latched to Avoid False
    Clocking
● Applications Include:
    – Buffer/Storage Registers
    – Shift Registers
    – Pattern Generators
   

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Part name(s)' : 74AC11377D 74AC11377N 74AC11377 74ACT11377D 74ACT11377N
Description : Octal D-TYPE flip flop WITH ENABLE
Philips
Philips Electronics

Octal D-TYPE flip flop WITH ENABLE

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Part name(s)' : 74LS377 DM74LS377 DM74LS377N DM74LS377NX DM74LS377WM DM74LS377WMX
Description : Octal D-TYPE Flip-Flop WITH Common ENABLE AND Clock
Fairchild
Fairchild Semiconductor

General Description

The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-TYPE FLIP-FLOPS WITH a buffered common clock AND a buffered common input ENABLE. The device is packaged in the space-saving (0.3 inch row spacing) 20-pin package.



Features

■8-bit high speed parallel registers

■Positive edge-triggered D-TYPE FLIP-FLOPS

■Fully buffered common clock AND ENABLE inputs


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Part name(s)' : 74HCT377 74HC377
Description : OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER
ETC1
Unspecified

OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER

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