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Part Name(s) : PA7572 PA7572P-20 PA7572PI-20 PA7572F-20 PA7572FI-20 PA7572J-20 PA7572JI-20 International-Cmos
International Cmos Technology
Description : Programmable Electrically Erasable Logic Array View

General Description
The PA7572 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology. PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’s Programmable Logic designs. The PA7572 offers a versatile Logic Array architecture with 24 I/O pins, 14 input pins and 60 registers/latches (24 buried Logic cells, 12 input registers/latches, 24 buried I/O registers/latches). Its Logic Array implements 100 sum-of-products Logic functions divided into two groups each serving 12 Logic cells. Each group shares half (60) of the 120 product-terms available.

Versatile Logic Array Architecture
    - 24 I/Os, 14 inputs, 60 registers/latches
    - Up to 72 Logic cell output functions
    - PLA structure with true product-term sharing
    - Logic functions and registers can be I/O-buried
High-Speed Commercial and Industrial Versions
    - As fast as 13ns/20ns (tpdi/tpdx), 66.6MHz (fMAX)
    - Industrial grade available for 4.5 to 5.5V VCC and -40 to +85 °C temperatures
Ideal for Combinatorial, Synchronous and Asynchronous Logic Applications
    - Integration of multiple PLDs and random Logic
    - Buried counters, complex state-machines
    - Comparators, decoders, other wide-gate functions
CMOS Electrically Erasable Technology
    - ReProgrammable in 40-pin DIP, 44-pin PLCC and TQFP packages
Flexible Logic Cell
    - Up to 3 output functions per Logic cell
    - D,T and JK registers with special features
    - Independent or global clocks, resets, presets, clock polarity and output enables
    - Sum-of-products Logic for output enables
Development and Programmer Support
    - ICT PLACE Development Software
    - Fitters for ABEL, CUPL and other software
    - Programming support by popular third-party programmers

Part Name(s) : PA7540 PA7540J-15 PA7540JI-15 PA7540JN-15 PA7540JNI-15 PA7540P-15 PA7540PI-15 PA7540S-15 PA7540SI-15 Anachip
Anachip Corporation
Description : PA7540 PEEL ArrayProgrammable Electrically Erasable Logic Array View

General Description

The PA7540 is a member of the Programmable Electrically Erasable Logic (PEELô) Array family based on ICTís CMOS EEPROM technology. PEELô Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for todayís Programmable Logic designs.



Most Powerful 24-pin PLD Available

- 20 I/Os, 2 inputs/clocks, 40 registers/latches

- 40 Logic cell output functions

- PLA structure with true product-term sharing

- Logic functions and registers can be I/O-buried



Ideal for Combinatorial, Synchronous and Asynchronous Logic Applications

- Integration of multiple PLDs and random Logic

- Buried counters, complex state-machines

- Comparators, decoders, multiplexers and other wide gate functions



High-Speed Commercial and Industrial Versions

- As fast as 10ns/15ns (tpdi/tpdx), 71.4MHz (fMAX)

- Industrial grade available for 4.5 to 5.5V VCC and -40 to +85 °C temperatures



CMOS Electrically Erasable Technology

- ReProgrammable in 24-pin DIP, SOIC and 28-pin PLCC packages

- Optional JN package for 22V10 power/ground compatibility



Flexible Logic Cell

- 2 output functions per Logic cell

- D,T and JK registers with special features

- Independent or global clocks, resets, presets, clock polarity and output enables

- Sum-of-products Logic for output enables



Development and Programmer Support

- Anachipís WinPLACE Development Software

- Fitters for ABEL, CUPL and other software

- Programming support by popular third-party programmers



 


Part Name(s) : PEEL18CV8 International-Cmos
International Cmos Technology
Description : CMOS Programmable Electrically Erasable Logic Device View

General Description

The PEEL18CV8 is a Programmable Electrically Erasable Logic (PEEL) device providing an attractive alternative to ordinary PLDs. The PEEL18CV8 offers the performance, lexibility, ease of design and production practicality neededy Logic designers today.



Features

■ Multiple Speed Power, Temperature Options

- VCC= 5 Volts ±10%

- Speeds ranging from 5ns to 25 ns

- Power as low as 37mA at 25MHz

- Commercial and industrial versions available

■ CMOS Electrically Erasable Technology

- Superior factory testing

- ReProgrammable in plastic package

- Reduces retrofit and development costs

■ Development / Programmer Support

- Third party software and programmers

- ICT PLACE Development Software and PDS-3 rogrammer

- PLD-to-PEEL JEDEC file translator

■ Application Versatility

- Replaces random Logic

- Super sets PLDs (PAL, GAL, EPLD)

- Enhanced Architecture fits more Logic than ordinary LDs


Part Name(s) : PA7128 PA7128P-15 PA7128P-20 PA7128PI-15 PA7128PI-20 PA7128T-15 PA7128T-20 PA7128TI-15 PA7128TI-20 PA7128J-15 International-Cmos
International Cmos Technology
Description : Programmable Electrically Erasable Logic Array View

General Description
The PA7128 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology. PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’s Programmable Logic designs.

Features
■ CMOS Electrically Erasable Technology
    − ReProgrammable in 28-pin DIP, SOIC and PLCC packages
■ Versatile Logic Array Architecture
    − 12 I/Os, 14 inputs, 36 registers/latches
    − Up to 36 Logic cell output functions
    − PLA structure with true product-term sharing
    − Logic functions and registers can be I/O-buried
■ Flexible Logic Cell
    − Up to 3 output functions per Logic cell
    − D,T and JK registers with special features
    − Independent or global clocks, resets, presets, clock polarity and output enables
    − Sum-of-products Logic for output enables
    − As fast as 9ns/15ns (tpdi/tpdx), 83.3MHz (fMAX)
    − Industrial grade available for 4.5 to 5.5V Vcc and -40 to +85 °C temperatures
■ Ideal for Combinatorial, Synchronous and Asynchronous Logic Applications
    − Integration of multiple PLDs and random Logic
    − Buried counters, complex state-machines
    − Comparitors, decoders, other wide-gate functions
■ Development and Programmer Support
    − ICT PLACE Development Software
    − Fitters for ABEL, CUPL and other software
    − Programming support by ICT PDS-3 and other popular third-party programmers.


Part Name(s) : PA7140 PA7140P-20 PA7140P-25 PA7140PI-20 PA7140PI-25 PA7140F-20 PA7140F-25 PA7140FI-20 PA7140FI-25 PA7140J-20 International-Cmos
International Cmos Technology
Description : Programmable Electrically Erasable Logic Array View

General Description
The PA7140 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology. PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’s Programmable Logic designs. The PA7140 offers a versatile Logic Array architecture with 24 I/O pins, 14 input pins and 60 registers/latches (24 buried Logic cells, 12 input registers/latches, 24 buried I/O registers/latches). Its Logic Array implements 100 sum-of-products Logic functions divided into two groups each serving 12 Logic cells. Each group shares half (60) of the 120 product-terms available for Logic cells.

Features
■ Versatile Logic Array Architecture
    - 24 I/Os, 14 inputs, 60 registers/latches
    - Up to 72 Logic cell output functions
    - PLA structure with true product-term sharing
    - Logic functions and registers can be I/O-buried
■ High-Speed Commercial and Industrial Versions
    - As fast as 13ns/20ns (tpdi/tpdx), 66.6MHz (fMAX)
    - Industrial grade available for 4.5 to 5.5V Vcc and -40 to +85 °C temperatures Ideal for Combinatorial, Synchronous and Asynchronous Logic Applications
    - Integration of multiple PLDs and random Logic
    - Buried counters, complex state-machines
    - Comparators, decoders, other wide-gate functions
■ CMOS Electrically Erasable Technology
    - ReProgrammable in 40-pin DIP, 44-pin PLCC, and TQFP packages
■ Flexible Logic Cell
    - Up to 3 output functions per Logic cell
    - D,T and JK registers with special features
    - Independent or global clocks, resets, presets, clock polarity and output enables
    - Sum-of-products Logic for output enables
■ Development and Programmer Support
    - ICT PLACE Development Software
    -Fitters for ABEL, CUPL and other software
    -Programming support for by ICT PDS-3 and popular third-party programmers

Part Name(s) : NMC9346 NMC9346E NMC9346EM8 NMC9346EN NMC9346M8 NMC9346N National-Semiconductor
National ->Texas Instruments
Description : 1024-BIT SERIAL Electrically Erasable Programmable MEMORY View

1024-BIT SERIAL Electrically Erasable Programmable MEMORY


Part Name(s) : PEEL22CV10AZ-25 PEEL22CV10AZJ-25 PEEL22CV10AZJI-25 PEEL22CV10AZP-25 PEEL22CV10AZPI-25 PEEL22CV10AZS-25 PEEL22CV10AZSI-25 PEEL22CV10AZT-25 PEEL22CV10AZTI-25 ETC2
Unspecified
Description : CMOS Programmable Electrically Erasable Logic Device View

[ICT]



General Description

The PEEL™22CV10AZ is a Programmable Electrically Erasable Logic (PEEL™) device that provides a low power alternative to ordinary PLDs. The PEEL™22CV10AZ is available in 24-pin DIP, SOIC, TSSOP and 28-pin PLCC packages (see Figure 19).

A “zero-power” (100µA max. ICC) standby mode makes the PEEL™22CV10AZ ideal for power sensitive applications such as handheld meters, portable communication equipment and laptop computers/ peripherals. EE-reprogrammability provides the convenience of instant reprogramming for development and a reusable production inventory minimizing the impact of programming changes or errors. EE reprogrammability also improves factory testability, thus ensuring the highest quality possible.



Features

■ Ultra Low Power Operation

   - VCC = 5 Volts ±10%

   - Icc = 10 µA (typical) at standby

   - Icc = 2 mA (typical) at 1 MHz

   - tPD = 25ns.

■ CMOS Electrically Erasable Technology

   - Superior factory testing

   - ReProgrammable in plastic package

   - Reduces retrofit and development costs

■ Development/Programmer Support

   - Third party software and programmers

   - ICT PLACE Development Software and PDS-3 programmer

■ Architectural Flexibility

   - 133 product terms x 44 input AND Array

   - Up to 22 inputs and 10 I/O pins

   - 12 possible macrocell configurations

   - Synchronous preset, asynchronous clear

   - Independent output enables

   - Programmable clock source and polarity

   - 24-pin DIP/SOIC/TSSOP and 28-pin PLCC

■ Application Versatility

   - Replaces random Logic

   - Pin and JEDEC compatible with 22V10

   - Ideal for power-sensitive systems



 


Part Name(s) : M6M80041P M6M80041FP Mitsubishi
MITSUBISHI ELECTRIC
Description : 4096-BIT (256-WORD BY 16-BIT) Electrically Erasable AND Programmable ROM View

4096-BIT (256-WORD BY 16-BIT) Electrically Erasable AND Programmable ROM

Part Name(s) : ATF16V8C ATF16V8C-5JX ATF16V8C-7JU ATF16V8C-7PU ATF16V8C ATF16V8C-5JX ATF16V8C-7JU ATF16V8C-7PU ATF16V8C-7SU ATF16V8C-5JC Atmel
Atmel Corporation
Description : High Performance Electrically-Erasable Programmable Logic Devices View

High Performance Electrically-Erasable PLD

Description
The Atmel® ATF16V8C is a high performance EECMOS Programmable Logic Device (PLD) which utilizes the Atmel proven Electrically-Erasable (EE) Flash memory technology. Offered options include speeds down to 5ns and a 100μA pin-controlled power-down mode. All speed ranges are specified over the full 5V ± 10% range for industrial temperature range, and 5V ± 5% for commercial range 5V devices.

Features
• Industry Standard Architecture
   ̶ Emulates Many 20-pin PALs®
   ̶ Low-cost, Easy to Use Software Tools
• High Speed Electrically-Erasable Programmable Logic Devices (EE PLD)
   ̶ 5ns Maximum Pin-to-pin Delay
• Low Power, 100μA Pin Controlled Power-down Mode Option
• CMOS and TTL Compatible Inputs and Outputs
   ̶ Input and I/O Pin Keeper Circuits
• Advanced Flash Technology
   ̶ ReProgrammable
   ̶ 100% Tested
• High Reliability CMOS Process
   ̶ 20 Year Data Retention
   ̶ 100 Erase/Write Cycles
   ̶ 2,000V ESD Protection
   ̶ 200mA Latchup Immunity
• Commercial and Industrial Temperature Ranges
• Dual-in-line and Surface Mount Packages in Standard Pinouts
• PCI Compliant
• Green (ROHS Compliant) Package Options Available

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