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Description : QUADRUPLE 2-INPUT Positive NAND SCHMITT-TRIGGERS

QUADRUPLE 2-INPUT Positive NAND SCHMITT-TRIGGERS

Part Name(s) : 74LS132 HD74LS132
Hitachi
Hitachi -> Renesas Electronics
Description : Quad 2-INPUT Positive NAND SCHMITT-TRIGGERS

Quad 2-INPUT Positive NAND SCHMITT-TRIGGERS

System-Logic
System Logic Semiconductor
Description : Quad 2-INPUT NAND SCHMITT TRIGGERS

Quad 2-INPUT NAND SCHMITT TRIGGERS
High-Voltage Silicon-Gate CMOS

The SL4093B consists of four SCHMITT-trigger circuits. Each circuit functions as a two-input NAND gate with SCHMITT-trigger action on both inputs. The gate switches at different points for positive- and negative- going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH) (see Fig.1).

 • Operating Voltage Range: 3.0 to 18 V
 • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
 • Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

INTE-ElectronicGRAL
Integral Corp.
Description : Quad 2-INPUT NAND SCHMITT TRIGGERS

Quad 2-INPUT NAND SCHMITT TRIGGERS
High-Voltage Silicon-Gate CMOS

The IW4093B consists of four SCHMITT-trigger circuits. Each circuit functions as a two-input NAND gate with SCHMITT-trigger action on both inputs. The gate switches at different points for positive- and negative going signals. The difference between the positive voltage (VТ+) and the negative voltage (VТ-) is defined as hysteresis voltage (VH) (see Fig.1).

• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
    0.5 V min @ 5.0 V supply
    1.0 V min @ 10.0 V supply
    1.5 V min @ 15.0 V supply

Part Name(s) : HD14093 HD14093B
Hitachi
Hitachi -> Renesas Electronics
Description : QUADRUPLE 2-INPUT NAND SCHMITT Trigger

QUADRUPLE 2-INPUT NAND SCHMITT Trigger

SLS
System Logic Semiconductor
Description : Quad 2-INPUT NAND SCHMITT TRIGGERS High-Voltage Silicon-Gate CMOS

Quad 2-INPUT NAND SCHMITT TRIGGERS
High-Voltage Silicon-Gate CMOS

The SL4093B consists of four SCHMITT-trigger circuits. Each circuit functions as a two-input NAND gate with SCHMITT-trigger action on both inputs. The gate switches at different points for positive- and negative- going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH) (see Fig.1).

 • Operating Voltage Range: 3.0 to 18 V
 • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
 • Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

IKSEMICON
IK Semicon Co., Ltd
Description : Quad 2-INPUT NAND SCHMITT TRIGGERS High-Voltage Silicon-Gate CMOS

Quad 2-INPUT NAND SCHMITT TRIGGERS High-Voltage Silicon-Gate CMOS

The IW4093B consists of four SCHMITT-trigger circuits. Each circuit functions as a two-input NAND gate with SCHMITT-trigger action on both inputs. The gate switches at different points for positive- and negativegoing signals. The difference between the positive voltage (VТ+) and the negative voltage (VТ-) is defined as hysteresis voltage (VH) (see Fig.1).

• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
    0.5 V min @ 5.0 V supply
    1.0 V min @ 10.0 V supply
    1.5 V min @ 15.0 V supply

Integral
Integral Corp.
Description : Quad 2-INPUT NAND SCHMITT TRIGGERS High-Voltage Silicon-Gate CMOS

Quad 2-INPUT NAND SCHMITT TRIGGERS

High-Voltage Silicon-Gate CMOS



The IW4093B consists of four SCHMITT-trigger circuits. Each circuit functions as a two-input NAND gate with SCHMITT-trigger action on both inputs. The gate switches at different points for positive- and negative- going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH) (see Fig.1).



•  Operating Voltage Range: 3.0 to 18 V

•  Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C

•  Noise margin (over full package temperature range):

   1.0 V min @ 5.0 V supply

   2.0 V min @ 10.0 V supply

   2.5 V min @ 15.0 V supply


Part Name(s) : HD74LS26
Hitachi
Hitachi -> Renesas Electronics
Description : QUADRUPLE 2-INPUT High-voltage Interface Positive NAND Gates

QUADRUPLE 2-INPUT High-voltage Interface Positive NAND Gates

Part Name(s) : 74LS38 HD74LS38
Hitachi
Hitachi -> Renesas Electronics
Description : QUADRUPLE 2-INPUT Positive NAND Buffers(with Open Collector Outputs)

QUADRUPLE 2-INPUT Positive NAND Buffers(with Open Collector Outputs)

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