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74ACTQ74

  

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74ACTQ74 [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74CW  74ACTQ74PC  74ACTQ74PCX  74ACTQ74SC  74ACTQ74SCX  74ACTQ74SJ  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74CW [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74PC  74ACTQ74PCX  74ACTQ74SC  74ACTQ74SCX  74ACTQ74SJ  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74PC [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74CW  74ACTQ74PCX  74ACTQ74SC  74ACTQ74SCX  74ACTQ74SJ  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74SC [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74CW  74ACTQ74PC  74ACTQ74PCX  74ACTQ74SCX  74ACTQ74SJ  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74SJ [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74CW  74ACTQ74PC  74ACTQ74PCX  74ACTQ74SC  74ACTQ74SCX  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74PCX [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74CW  74ACTQ74PC  74ACTQ74SC  74ACTQ74SCX  74ACTQ74SJ  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74SCX [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74CW  74ACTQ74PC  74ACTQ74PCX  74ACTQ74SC  74ACTQ74SJ  74ACTQ74SJX 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74SJX [Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop ]

other parts : 74ACTQ74  74ACTQ74CW  74ACTQ74PC  74ACTQ74PCX  74ACTQ74SC  74ACTQ74SCX  74ACTQ74SJ 

Fairchild
Fairchild Semiconductor

General Description
The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) out puts. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Improved latch-up immunity
■4 kV minimum ESD immunity
■TTL-compatible inputs

View
74ACTQ74SC_Q [Flip Flops Dl D-Type Flip-Flop ] Fairchild
Fairchild Semiconductor
View
74ACTQ74SJ_Q [Flip Flops Dl D-Type Flip-Flop ] Fairchild
Fairchild Semiconductor
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