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74HCT280DB

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74HCT280DB [9-bit odd/even parity generator/checker ]

other parts : 74HC280  74HC280N  74HC280D  74HC280U  74HCT280  74HCT280N  74HCT280D  74HC280DB  74HC280PW  74HCT280U 

Philips
Philips Electronics

GENERAL DESCRIPTION
The 74HC/HCT280 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
   
FEATURES
• Word-length easily expanded by cascading
• Similar pin configuration to the “180” for easy system
    up-grading
• Generates either odd or even parity for nine data bits
• Output capability: standard
• ICC category: MSI
   
APPLICATIONS
• 25-line parity generator/checker
• 81-line parity generator/checker
   

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74HCT280DB [9-bit odd/even parity generator/checker ]

other parts : 74HC280  74HC280D  74HCT280  74HCT280D 

NXP
NXP Semiconductors.

General description
The 74HC280; 74HCT280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8) is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
   
Features and benefits
■ Complies with JEDEC standard no. 7A
■ Input levels:
    ◆ For 74HC280: CMOS level
    ◆ For 74HCT280: TTL level
■ Word-length easily expanded by cascading
■ Generates either odd or even parity for nine data bits
■ ESD protection:
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115-A exceeds 200 V
■ Specified from -40°C to +85°C and -40°C to +125°C
   

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