Integrated circuits, Transistor, Semiconductors Free Datasheet Search and Download Site

EM636165TS-7G

  

Datasheet

Match, Like EM636165TS-7G
Start with N/A
End N/A
Included N/A
View Details    
EM636165TS-7G [1Mega x 16 Synchronous DRAM (SDRAM) ]

other parts : EM636165  EM636165BE  EM636165BE-10G  EM636165BE-55G  EM636165BE-5G  EM636165BE-6G  EM636165BE-7G 

Etron
Etron Technology

Overview
The EM636165 SDRAM is a high-speed CMOS synchronous DRAM containing 16 Mbits. It is internally configured as a dual 512K word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 512K x 16 bit banks is organized as 2048 rows by 256 columns by 16 bits. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.
The EM636165 provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications

Features
· Fast access time: 4.5/5/5/5.5/6.5/7.5 ns
· Fast clock rate: 200/183/166/143/125/100 MHz
· Self refresh mode: standard and low power
· Internal pipelined architecture
· 512K word x 16-bit x 2-bank
· Programmable Mode registers
   - CAS# Latency: 1, 2, or 3
   - Burst Length: 1, 2, 4, 8, or full page
   - Burst Type: interleaved or linear burst
   - Burst stop function
· Individual byte controlled by LDQM and UDQM
· Auto Refresh and Self Refresh
· 4096 refresh cycles/64ms
· CKE power down mode
· JEDEC standard +3.3V±0.3V power supply
· Interface: LVTTL
· 50-pin 400 mil plastic TSOP II package
· 60-ball, 6.4x10.1mm VFBGA package
· Lead Free Package available for both TSOP II and VFBGA

 

View
1
Share Link : 

New and Popular Datasheet

LM317  PN2222A  1N4007  LM324N  1N4947  FR105  FR204G  LC75374E  REC5  LA4550  S7010  MB39A108_03  FT5753M  BSS110  2SK2019-01  2SK1279  2SK1277  2SK2050  2SK1507  2SK1507-01M  ESAD83-004  7MBR15SA120D-01  2MBI100NB-120  MMA8451Q  MMZ09312BT1  MPXV7002  MMA7260Q  33975_05  33975_08  ZVNL120A  2SD1351  65239-005LF_  XR21V1412  7MBR35SB120-01  SK3699-01MR  GL852G  ESAD83-004K  D83-004  IRF510S  AD7892ANZ-1  7MBR10VKA060-50  XR21V1412IL-0B-EB  NA12W-K  MPC18730EP  M57184N-715B  IRF510  GZF10C  ESAD83-004R  CA4800C  7MBP150RA060  0204-125  RY5W-K  PDMB400B12C  MTP4N10  TDA2030A 

HOME




Language : 한국어     日本語     русский     简体中文     español
@ 2015 - 2018  [ Home ][ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]