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MC74HC164A

  

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MC74HC164A [8−Bit Serial−Input/Parallel−Output Shift Register ]

other parts : MC54HC164A  MC54HC164AJ  MC74HC164AN  MC74HC164AD  MC74HC164ADT 

Motorola
Motorola => Freescale

8−Bit Serial−Input/Parallel−Output Shift Register
High–Performance Silicon–Gate CMOS

The MC54/74HC164A is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The MC54/74HC164A is an 8–bit, serial–input to parallel–output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active–low asynchronous Reset overrides the Clock and Serial Data inputs.

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 244 FETs or 61 Equivalent Gates

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MC74HC164A [8-Bit Serial-Input/Parallel-Output Shift Register ]

other parts : MC74HC164ANG  MC74HC164ADG  MC74HC164ADR2G  MC74HC164ADTR2G  NLV74HC164ADR2G  NLV74HC164ADTR2G 

ON-Semiconductor
ON Semiconductor

8-Bit Serial-Input/Parallel-Output Shift Register
High−Performance Silicon−Gate CMOS

The MC74HC164A is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The MC74HC164A is an 8−bit, serial−input to parallel−output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active−low asynchronous Reset overrides the Clock and Serial Data inputs.

Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 V to 6.0 V
• Low Input Current: 1 μA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the JEDEC Standard No. 7 A Requirements
• Chip Complexity: 244 FETs or 61 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant

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MC74HC164AD [8−Bit Serial−Input/Parallel−Output Shift Register ]

other parts : MC74HC164AN  MC74HC164ADR2  MC74HC164ADTR2  MC74HC164AFEL  MC74HC164AFELG 

ON-Semiconductor
ON Semiconductor

8−Bit Serial−Input/Parallel−Output Shift Register
High−Performance Silicon−Gate CMOS

The MC74HC164A is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The MC74HC164A is an 8−bit, serial−input to parallel−output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active−low asynchronous Reset overrides the Clock and Serial Data inputs.

Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 V to 6.0 V
• Low Input Current: 1 μA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the JEDEC Standard No. 7A Requirements
• Chip Complexity: 244 FETs or 61 Equivalent Gates
• Pb−Free Packages are Available

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MC74HC164ADT [8−Bit Serial−Input/Parallel−Output Shift Register ]

other parts : MC74HC164ADTEL  MC74HC164AF  MC74HC164AFR1  MC74HC164AFR2 

ON-Semiconductor
ON Semiconductor

8−Bit Serial−Input/Parallel−Output Shift Register
High–Performance Silicon–Gate CMOS

The MC74HC164A is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The MC74HC164A is an 8–bit, serial–input to parallel–output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active–low asynchronous Reset overrides the Clock and Serial Data inputs.

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 244 FETs or 61 Equivalent Gates

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