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MC9S12DB128VPVE

  

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MC9S12DB128VPV [MC9S12DT128 Device User Guide V02.12 ]

other parts : MC9S12A128  MC9S12A128CFU  MC9S12A128CPV  MC9S12A128CPVE  MC9S12A128MFU  MC9S12A128MPV  MC9S12A128MPVE  MC9S12A128VFU  MC9S12A128VPV  MC9S12A128VPVE  MC9S12DB128  MC9S12DB128CFU  MC9S12DB128CPV  MC9S12DB128CPVE  MC9S12DB128MFU  MC9S12DB128MPV  MC9S12DB128MPVE  MC9S12DB128VFU  MC9S12DB128VPVE  MC9S12DG128  MC9S12DG128CFU  MC9S12DG128CPV  MC9S12DG128CPVE  MC9S12DG128E  MC9S12DG128ECFU  MC9S12DG128ECPV  MC9S12DG128ECPVE  MC9S12DG128EMFU  MC9S12DG128EMPV  MC9S12DG128EMPVE  MC9S12DG128EVFU  MC9S12DG128EVPV  MC9S12DG128EVPVE  MC9S12DG128MFU  MC9S12DG128MPV  MC9S12DG128MPVE  MC9S12DG128VFU  MC9S12DG128VPV  MC9S12DG128VPVE  MC9S12DJ128  MC9S12DJ128CFU  MC9S12DJ128CPV  MC9S12DJ128CPVE  MC9S12DJ128E  MC9S12DJ128ECFU  MC9S12DJ128ECPV  MC9S12DJ128ECPVE  MC9S12DJ128EMFU  MC9S12DJ128EMPV  MC9S12DJ128EMPVE 

Motorola
Motorola => Freescale

Overview
The MC9S12DT128 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules (MSCAN12), a Byteflight module and an Inter-IC Bus.

Features
• HCS12 Core
– 16-bit HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii.20-bit ALU
iv. Instruction queue
v. Enhanced indexed addressing
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
– BDM (Background Debug Module)
• CRG (Clock and Reset Generator)
– Choice of low current Colpitts oscillator or standard Pierce Oscillator
– PLL
– COP watchdog
– real time interrupt
– clock monitor
• 8-bit and 4-bit ports with interrupt functionality
– Digital filtering
– Programmable rising or falling edge trigger
• Memory
– 128K Flash EEPROM
– 2K byte EEPROM
– 8K byte RAM
• Two 8-channel Analog-to-Digital Converters
– 10-bit resolution
– External conversion trigger capability
• Three 1M bit per second, CAN 2.0 A, B software compatible modules
– Five receive and three transmit buffers
– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bi
– Four separate interrupt channels for Rx, Tx, error and wake-up
– Low-pass filter wake-up function
– Loop-back for self test operation
• Enhanced Capture Timer
– 16-bit main counter with 7-bit prescaler
– 8 programmable input capture or output compare channels
– Four 8-bit or two 16-bit pulse accumulators
• 8 PWM channels
– Programmable period and duty cycle
– 8-bit 8-channel or 16-bit 4-channel
– Separate control for each pulse width and duty cycle
– Center-aligned or left-aligned outputs
– Programmable clock select logic with a wide range of frequencies
– Fast emergency shutdown input
– Usable as interrupt inputs
• Serial interfaces
– Two asynchronous Serial Communications Interfaces (SCI)
– Two Synchronous Serial Peripheral Interface (SPI)
– Byteflight
• Byte Data Link Controller (BDLC)
• SAE J1850 Class B Data Communications Network Interface
– Compatible and ISO Compatible for Low-Speed (<125 Kbps) Serial Data Communications in
Automotive Applications
• Inter-IC Bus (IIC)
– Compatible with I2C Bus standard
– Multi-master operation
– Software programmable for one of 256 different serial clock frequencies
• 112-Pin LQFP and 80-Pin QFP package options
– I/O lines with 5V input and drive capability
– 5V A/D converter inputs
– Operation at 50MHz equivalent to 25MHz Bus Speed
– Development support
– Single-wire background debug™ mode
– On-chip hardware breakpoints

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