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A8029

  

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TA8029S [FREQUENCY TO VOLTAGE CONVERTER ]

other parts : TA8029 

Toshiba
Toshiba
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TDA8029HL/C2 [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029C2  TDA8029HL  TDA8029HL/C1 

Philips
Philips Electronics

GENERAL DESCRIPTION
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface.

FEATURES
• 80C51 core with 16 kbytes ROM, 256 bytes RAM and 512 bytes XRAM
• Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
• Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing during Answer To Reset (ATR) and for T = 1 protocol
• VCC generation (5 V ± 5 % or 3 V ± 5 % or 1.8 V), maximum current 65 mA with controlled rise and fall times
• Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1/2fXTAL, 1/4fXTAL and 1/8fXTAL)
• Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
• Automatic activation and deactivation sequences through an independant sequencer
• Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   – ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   – ISO 7816 and EMV 2000 (TDA8029HL/C2).
• 1 to 8 characters FIFO in reception mode
• Parity error counter in reception mode and in transmission mode with automatic retransmission
• Versatile 24-bit time-out counter for ATR and waiting times processing
• Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)
• Minimum delay between two characters in reception mode:
   – In protocol T = 0:
      12 ETU (TDA8029HL/C1)
      11.8 ETU (TDA8029HL/C2).
   – In protocol T = 1:
      11 ETU (TDA8029HL/C1)
      10.8 ETU (TDA8029HL/C2).
• Supports synchronous cards which do not use C4/C8
• Current limitations on card contacts
• Supply supervisor for power-on/off reset and spikes killing
• DC/DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower according to VCC and VDD
• Shut-down input for very low power consumption
• Enhanced ESD protection on card contacts (6 kV minimum)
• Software library for easy integration
• Communication with the host through a standard full duplex serial link at programmable baud rates
• One external interrupt input and four general purpose I/Os.

APPLICATIONS
• Portable card readers
• General purpose card readers
• EMV compliant card readers.

 

View
TDA8029C1 [Low power single card reader ]

other parts : TDA8029  TDA8029C2  TDA8029HL  TDA8029HL/C1  TDA8029HL/C2 

NXP
NXP Semiconductors.

General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface. The TDA8029 may be delivered with standard embedded software, or be masked with specific customer code. For details on software development and on available tools, please refer to application notes “AN01009” and “AN10134” for the TDA8029HL/C1. For standard embedded software, please refer to “AN10206” for the TDA8029HL/C2.

Features
■ 80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
■ Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
■ Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
■ VCC generation with controlled rise and fall times:
   ◆ 5 V ± 5 %, maximum current 65 mA
   ◆ 3 V ± 5 %, maximum current 50 mA; maximum current 65 mA if VDD > 3 V
   ◆ 1.8 V ± 5 %, maximum current 30 mA
■ Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1⁄2fXTAL, 1⁄4fXTAL and 1⁄8fXTAL)
■ Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
■ Automatic activation and deactivation sequences through an independent sequencer
■ Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   ◆ ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   ◆ ISO 7816 and EMV 2000 (TDA8029HL/C2).
■ 1 to 8 characters FIFO in reception mode
■ Parity error counter in reception mode and in transmission mode with automatic retransmission
■ Versatile 24-bit time-out counter for ATR and waiting times processing
■ Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)

View
TDA8029HL/C1 [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029C2  TDA8029HL  TDA8029HL/C2 

Philips
Philips Electronics

GENERAL DESCRIPTION
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface.

FEATURES
• 80C51 core with 16 kbytes ROM, 256 bytes RAM and 512 bytes XRAM
• Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
• Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing during Answer To Reset (ATR) and for T = 1 protocol
• VCC generation (5 V ± 5 % or 3 V ± 5 % or 1.8 V), maximum current 65 mA with controlled rise and fall times
• Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1/2fXTAL, 1/4fXTAL and 1/8fXTAL)
• Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
• Automatic activation and deactivation sequences through an independant sequencer
• Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   – ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   – ISO 7816 and EMV 2000 (TDA8029HL/C2).
• 1 to 8 characters FIFO in reception mode
• Parity error counter in reception mode and in transmission mode with automatic retransmission
• Versatile 24-bit time-out counter for ATR and waiting times processing
• Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)
• Minimum delay between two characters in reception mode:
   – In protocol T = 0:
      12 ETU (TDA8029HL/C1)
      11.8 ETU (TDA8029HL/C2).
   – In protocol T = 1:
      11 ETU (TDA8029HL/C1)
      10.8 ETU (TDA8029HL/C2).
• Supports synchronous cards which do not use C4/C8
• Current limitations on card contacts
• Supply supervisor for power-on/off reset and spikes killing
• DC/DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower according to VCC and VDD
• Shut-down input for very low power consumption
• Enhanced ESD protection on card contacts (6 kV minimum)
• Software library for easy integration
• Communication with the host through a standard full duplex serial link at programmable baud rates
• One external interrupt input and four general purpose I/Os.

APPLICATIONS
• Portable card readers
• General purpose card readers
• EMV compliant card readers.

 

View
TDA8029HL [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029C2  TDA8029HL/C1  TDA8029HL/C2 

Philips
Philips Electronics

GENERAL DESCRIPTION
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface.

FEATURES
• 80C51 core with 16 kbytes ROM, 256 bytes RAM and 512 bytes XRAM
• Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
• Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing during Answer To Reset (ATR) and for T = 1 protocol
• VCC generation (5 V ± 5 % or 3 V ± 5 % or 1.8 V), maximum current 65 mA with controlled rise and fall times
• Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1/2fXTAL, 1/4fXTAL and 1/8fXTAL)
• Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
• Automatic activation and deactivation sequences through an independant sequencer
• Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   – ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   – ISO 7816 and EMV 2000 (TDA8029HL/C2).
• 1 to 8 characters FIFO in reception mode
• Parity error counter in reception mode and in transmission mode with automatic retransmission
• Versatile 24-bit time-out counter for ATR and waiting times processing
• Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)
• Minimum delay between two characters in reception mode:
   – In protocol T = 0:
      12 ETU (TDA8029HL/C1)
      11.8 ETU (TDA8029HL/C2).
   – In protocol T = 1:
      11 ETU (TDA8029HL/C1)
      10.8 ETU (TDA8029HL/C2).
• Supports synchronous cards which do not use C4/C8
• Current limitations on card contacts
• Supply supervisor for power-on/off reset and spikes killing
• DC/DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower according to VCC and VDD
• Shut-down input for very low power consumption
• Enhanced ESD protection on card contacts (6 kV minimum)
• Software library for easy integration
• Communication with the host through a standard full duplex serial link at programmable baud rates
• One external interrupt input and four general purpose I/Os.

APPLICATIONS
• Portable card readers
• General purpose card readers
• EMV compliant card readers.

 

View
TDA8029HL/C2 [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029C2  TDA8029HL  TDA8029HL/C1 

NXP
NXP Semiconductors.

General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface. The TDA8029 may be delivered with standard embedded software, or be masked with specific customer code. For details on software development and on available tools, please refer to application notes “AN01009” and “AN10134” for the TDA8029HL/C1. For standard embedded software, please refer to “AN10206” for the TDA8029HL/C2.

Features
■ 80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
■ Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
■ Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
■ VCC generation with controlled rise and fall times:
   ◆ 5 V ± 5 %, maximum current 65 mA
   ◆ 3 V ± 5 %, maximum current 50 mA; maximum current 65 mA if VDD > 3 V
   ◆ 1.8 V ± 5 %, maximum current 30 mA
■ Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1⁄2fXTAL, 1⁄4fXTAL and 1⁄8fXTAL)
■ Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
■ Automatic activation and deactivation sequences through an independent sequencer
■ Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   ◆ ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   ◆ ISO 7816 and EMV 2000 (TDA8029HL/C2).
■ 1 to 8 characters FIFO in reception mode
■ Parity error counter in reception mode and in transmission mode with automatic retransmission
■ Versatile 24-bit time-out counter for ATR and waiting times processing
■ Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)

View
TDA8029C2 [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029HL  TDA8029HL/C1  TDA8029HL/C2 

Philips
Philips Electronics

GENERAL DESCRIPTION
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface.

FEATURES
• 80C51 core with 16 kbytes ROM, 256 bytes RAM and 512 bytes XRAM
• Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
• Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing during Answer To Reset (ATR) and for T = 1 protocol
• VCC generation (5 V ± 5 % or 3 V ± 5 % or 1.8 V), maximum current 65 mA with controlled rise and fall times
• Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1/2fXTAL, 1/4fXTAL and 1/8fXTAL)
• Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
• Automatic activation and deactivation sequences through an independant sequencer
• Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   – ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   – ISO 7816 and EMV 2000 (TDA8029HL/C2).
• 1 to 8 characters FIFO in reception mode
• Parity error counter in reception mode and in transmission mode with automatic retransmission
• Versatile 24-bit time-out counter for ATR and waiting times processing
• Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)
• Minimum delay between two characters in reception mode:
   – In protocol T = 0:
      12 ETU (TDA8029HL/C1)
      11.8 ETU (TDA8029HL/C2).
   – In protocol T = 1:
      11 ETU (TDA8029HL/C1)
      10.8 ETU (TDA8029HL/C2).
• Supports synchronous cards which do not use C4/C8
• Current limitations on card contacts
• Supply supervisor for power-on/off reset and spikes killing
• DC/DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower according to VCC and VDD
• Shut-down input for very low power consumption
• Enhanced ESD protection on card contacts (6 kV minimum)
• Software library for easy integration
• Communication with the host through a standard full duplex serial link at programmable baud rates
• One external interrupt input and four general purpose I/Os.

APPLICATIONS
• Portable card readers
• General purpose card readers
• EMV compliant card readers.

 

View
TDA8029HL/C1 [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029C2  TDA8029HL  TDA8029HL/C2 

NXP
NXP Semiconductors.

General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface. The TDA8029 may be delivered with standard embedded software, or be masked with specific customer code. For details on software development and on available tools, please refer to application notes “AN01009” and “AN10134” for the TDA8029HL/C1. For standard embedded software, please refer to “AN10206” for the TDA8029HL/C2.

Features
■ 80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
■ Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
■ Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
■ VCC generation with controlled rise and fall times:
   ◆ 5 V ± 5 %, maximum current 65 mA
   ◆ 3 V ± 5 %, maximum current 50 mA; maximum current 65 mA if VDD > 3 V
   ◆ 1.8 V ± 5 %, maximum current 30 mA
■ Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1⁄2fXTAL, 1⁄4fXTAL and 1⁄8fXTAL)
■ Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
■ Automatic activation and deactivation sequences through an independent sequencer
■ Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   ◆ ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   ◆ ISO 7816 and EMV 2000 (TDA8029HL/C2).
■ 1 to 8 characters FIFO in reception mode
■ Parity error counter in reception mode and in transmission mode with automatic retransmission
■ Versatile 24-bit time-out counter for ATR and waiting times processing
■ Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)

View
TDA8029C1 [Low power single card reader ]

other parts : TDA8029  TDA8029C2  TDA8029HL  TDA8029HL/C1  TDA8029HL/C2 

Philips
Philips Electronics

GENERAL DESCRIPTION
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface.

FEATURES
• 80C51 core with 16 kbytes ROM, 256 bytes RAM and 512 bytes XRAM
• Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
• Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing during Answer To Reset (ATR) and for T = 1 protocol
• VCC generation (5 V ± 5 % or 3 V ± 5 % or 1.8 V), maximum current 65 mA with controlled rise and fall times
• Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1/2fXTAL, 1/4fXTAL and 1/8fXTAL)
• Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
• Automatic activation and deactivation sequences through an independant sequencer
• Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   – ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   – ISO 7816 and EMV 2000 (TDA8029HL/C2).
• 1 to 8 characters FIFO in reception mode
• Parity error counter in reception mode and in transmission mode with automatic retransmission
• Versatile 24-bit time-out counter for ATR and waiting times processing
• Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)
• Minimum delay between two characters in reception mode:
   – In protocol T = 0:
      12 ETU (TDA8029HL/C1)
      11.8 ETU (TDA8029HL/C2).
   – In protocol T = 1:
      11 ETU (TDA8029HL/C1)
      10.8 ETU (TDA8029HL/C2).
• Supports synchronous cards which do not use C4/C8
• Current limitations on card contacts
• Supply supervisor for power-on/off reset and spikes killing
• DC/DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower according to VCC and VDD
• Shut-down input for very low power consumption
• Enhanced ESD protection on card contacts (6 kV minimum)
• Software library for easy integration
• Communication with the host through a standard full duplex serial link at programmable baud rates
• One external interrupt input and four general purpose I/Os.

APPLICATIONS
• Portable card readers
• General purpose card readers
• EMV compliant card readers.

 

View
TDA8029HL [Low power single card reader ]

other parts : TDA8029  TDA8029C1  TDA8029C2  TDA8029HL/C1  TDA8029HL/C2 

NXP
NXP Semiconductors.

General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface. The TDA8029 may be delivered with standard embedded software, or be masked with specific customer code. For details on software development and on available tools, please refer to application notes “AN01009” and “AN10134” for the TDA8029HL/C1. For standard embedded software, please refer to “AN10206” for the TDA8029HL/C2.

Features
■ 80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
■ Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
■ Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
■ VCC generation with controlled rise and fall times:
   ◆ 5 V ± 5 %, maximum current 65 mA
   ◆ 3 V ± 5 %, maximum current 50 mA; maximum current 65 mA if VDD > 3 V
   ◆ 1.8 V ± 5 %, maximum current 30 mA
■ Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1⁄2fXTAL, 1⁄4fXTAL and 1⁄8fXTAL)
■ Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
■ Automatic activation and deactivation sequences through an independent sequencer
■ Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   ◆ ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   ◆ ISO 7816 and EMV 2000 (TDA8029HL/C2).
■ 1 to 8 characters FIFO in reception mode
■ Parity error counter in reception mode and in transmission mode with automatic retransmission
■ Versatile 24-bit time-out counter for ATR and waiting times processing
■ Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)

View
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