Integrated circuits, Transistor, Semiconductors Free Datasheet Search and Download Site

BD80

  

Datasheet

Match, Like BD800 BD801 BD802 BD807 BD808 BD809
Start with BD800* BD801* BD802* BD807* BD808* BD809*
End *ABD80 *FBD80 *3BD80 *6BD80 *4BD80 *1BD80 *2BD80
Included *BD80* *BD80,* *BD80/* *BD80F* *BD80P* *BD80Y*
View Details    
R5F71474BD80FPV [Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family ]

other parts : R5F7142  R5F71424AK64FPV  R5F71424BJ80FPV  R5F71426AK64FPV  R5F71426BD80FPV  R5F71426BJ80FPV  R5F7147 

Renesas
Renesas Electronics

Overview
Features
This LSI is a single-chip RISC (Reduced Instruction Set Computer) microcomputer that integrates a Renesas Technology original RISC CPU core with peripheral functions required for system configuration.

The CPU in this LSI has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, he 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low-cost, high-performance, and high-functioning systems, even for applications that were previously impossible with microcomputers, such as real-time control, which demands high speeds.

In addition, this LSI includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM and RAM, a data transfer controller (DTC), timers, a serial communication interface (SCI), a synchronous serial communication unit, an A/D converter, an nterrupt controller (INTC), I/O ports, and controller area network (RCAN-ET).

This LSI also provides an external memory access support function to enable direct connection to various memory devices or peripheral LSIs. These on-chip functions significantly reduce costs of designing and manufacturing application systems.

The version of on-chip ROM is F-ZTATTM (Flexible Zero Turn Around Time)* that includes flash memory. The flash memory can be programmed with a programmer that supports programming of his LSI, and can also be programmed and erased by software. This enables LSI chip to be reprogrammed at a user-site while mounted on a board.
The features of this LSI are listed in table 1.1.Overview
 

View
GE28F160C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
GT28F320C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
RC28F640C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
TE28F800C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
GE28F800C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
RC28F160C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
TE28F320C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
R5F71476BD80FPV [Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family ]

other parts : R5F7142  R5F71424AK64FPV  R5F71424BJ80FPV  R5F71426AK64FPV  R5F71426BD80FPV  R5F71426BJ80FPV  R5F7147 

Renesas
Renesas Electronics

Overview
Features
This LSI is a single-chip RISC (Reduced Instruction Set Computer) microcomputer that integrates a Renesas Technology original RISC CPU core with peripheral functions required for system configuration.

The CPU in this LSI has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, he 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low-cost, high-performance, and high-functioning systems, even for applications that were previously impossible with microcomputers, such as real-time control, which demands high speeds.

In addition, this LSI includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM and RAM, a data transfer controller (DTC), timers, a serial communication interface (SCI), a synchronous serial communication unit, an A/D converter, an nterrupt controller (INTC), I/O ports, and controller area network (RCAN-ET).

This LSI also provides an external memory access support function to enable direct connection to various memory devices or peripheral LSIs. These on-chip functions significantly reduce costs of designing and manufacturing application systems.

The version of on-chip ROM is F-ZTATTM (Flexible Zero Turn Around Time)* that includes flash memory. The flash memory can be programmed with a programmer that supports programming of his LSI, and can also be programmed and erased by software. This enables LSI chip to be reprogrammed at a user-site while mounted on a board.
The features of this LSI are listed in table 1.1.Overview
 

View
GE28F320C3BD80 [Intel Advanced+ Boot Block Flash Memory (C3) ]

other parts : 28F160C3  28F320C3  28F640C3  28F800C3  GE28F160C3BA100  GE28F160C3BA110  GE28F160C3BA70 

Intel
Intel

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

View
1 2 3 4 5

HOME




Language : 한국어     日本語     русский     简体中文     español
@ 2015 - 2018  [ Home ][ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]