General Description
The FIN3385 and FIN3383 transform 28 bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted.
Features
â Low power consumption
â 20 MHz to 85 MHz shift clock support
â r1V common-mode range around 1.2V
â Narrow bus reduces cable size and cost
â High throughput (up to 2.38 Gbps throughput)
â Internal PLL with no external component
â Compatible with TIA/EIA-644 specification
â Devices are offered 56-lead TSSOP packages
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