General description
The 74LVC06A provides six inverting buffers. The outputs are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

Features and benefits
■ 5 V tolerant inputs and outputs (open-drain) for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 5.5 V
■ CMOS low power consumption
■ Direct interface with TTL levels
■ Complies with JEDEC standard:
   ◆ JESD8-7A (1.65 V to 1.95 V)
   ◆ JESD8-5A (2.3 V to 2.7 V)
   ◆ JESD8-C/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
   ◆ HBM JESD22-A114F exceeds 2000 V
   ◆ MM JESD22-A115-B exceeds 200 V
   ◆ CDM JESD22-C101E exceeds 1000 V
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C