Features
⢠Registered inputs and outputs for pipelined operation
⢠64K à 32 common I/O architecture
⢠3.3V core power supply
⢠2.5V I/O operation
⢠Fast clock-to-output times
â 3.5 ns (for 166-MHz device)
â 4.0 ns (for 133-MHz device)
⢠Provide high-performance 3-1-1-1 access rate
⢠User-selectable burst counter supporting Intel®
Pentium® interleaved or linear burst sequences
⢠Separate processor and controller address strobes
⢠Synchronous self-timed writes
⢠Asynchronous output enable
⢠Offered in JEDEC-standard 100-pin TQFP package
⢠âZZâ Sleep Mode Option
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