DESCRIPTION
The ETC5057/ETC5054 family consists of A-law and 嵉law monolithic PCM CODEC/filters utilizing the A/D and D/A conversion architecture shown in the block diagram below, and a serial PCM interface. The devices are fabricated using doublepoly CMOS process. The encode portion of each device consists of an input gain adjust amplifier, an active RC pre-filter which eliminates very high frequency noise prior to entering a switched-capacitor band-pass filter that rejects signals below 200 Hz and above 3400 Hz. Also included are auto-zero circuitry and a companding coder which samples the filtered signal and encodes it in the companded A-law or 嵉law PCM format.
â COMPLETE CODEC AND FILTERING SYSTEM (DEVICE) INCLUDING:
â Transmit high-pass and low-pass filtering.
â Receive low-pass filter with sin x/x correction.
â Active RC noise filters
â µ-law or A-law compatible COder and DECoder.
â Internal precision voltage reference.
â Serial I/O interface.
â Internal auto-zero circuitry.
â A-LAW 16 PINS (ETC5057FN, 20 PINS)
â µ-LAW WITHOUT SIGNALING, 16 PINS (ETC5054FN, 20 PINS)
â MEETS OR EXCEEDS ALL D3/D4 AND CCITT SPECIFICATIONS
â ±5V OPERATION
â LOW OPERATING POWER - TYPICALLY 60 mW
â POWER-DOWN STANDBY MODE - TYPICALLY 3 mW
â AUTOMATIC POWER-DOWN
â TTL OR CMOS COMPATIBLE DIGITAL INTERFACES
â MAXIMIZES LINE INTERFACE CARD CIRCUIT DENSITY
â 0 to 70°C OPERATION
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