Description
The EDS2504AC/AP is a 256M bits SDRAM organized as 16,777,216 words à 4 bits à 4 banks. The EDS2508 AC/AP is a 256M bits SDRAM organized as 8,388,608 words à 8 bits à 4 banks. The EDS2516 AC/AP is a 256M bits SDRAM organized as 4194304 words à 16 bits à 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP (II).
Features
⢠3.3V power supply
⢠Clock frequency: 133MHz (max.)
⢠LVTTL interface
⢠Single pulsed /RAS
⢠4 banks can operate simultaneously and independently
⢠Burst read/write operation and burst read/single write operation capability
⢠Programmable burst length* (BL): 1, 2, 4, 8
⢠2 variations of burst sequence
 - Sequential (BL = 1, 2, 4, 8)
 - Interleave (BL = 1, 2, 4, 8)
⢠Programmable /CAS latency (CL): 2, 3
⢠Byte control by DQM
: DQM (EDS2504AC/AP, EDS2508AC/AP)
: UDQM, LDQM (EDS2516AC/AP)
⢠Refresh cycles: 8192 refresh cycles/64ms
⢠2 variations of refresh
 - Auto refresh
 - Self refresh
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