General Description
These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs.
Features
â 25 V, 0.22 A continuous, 0.65 A peak.
RDS(ON) = 4 Ω @ VGS= 4.5 V,
RDS(ON) = 5 Ω @ VGS= 2.7 V.
â Very low level gate drive requirements allowing direct
operation in 3 V circuits (VGS(th) < 1.5 V).
â Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
â Compact industry standard SC70-6 surface mount
package.
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