Description
The ispLSI 2096VE is a High Density Programmable Logic Device containing 96 Registers, six Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2096VE features in-system programmability through the Boundary Scan Test Access Port (TAP) and is 100% IEEE 1149.1 Boundary Scan Testable. The ispLSI 2096VE offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.
Features
⢠SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC
â 4000 PLD Gates
â 96 I/O Pins, Six Dedicated Inputs
â 96 Registers
â High Speed Global Interconnect
â Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
â Small Logic Block Size for Random Logic
â 100% Functional, JEDEC and Pinout Compatible with ispLSI 2096V Devices
â Pinout Compatible with ispLSI 2192VE
⢠3.3V LOW VOLTAGE 2096 ARCHITECTURE
â Interfaces with Standard 5V TTL Devices
⢠HIGH PERFORMANCE E2CMOS® TECHNOLOGY
â fmax = 250MHz Maximum Operating Frequency
â tpd = 4.0ns Propagation Delay
â Electrically Erasable and Reprogrammable
â Non-Volatile
â 100% Tested at Time of Manufacture
â Unused Product Term Shutdown Saves Power
⢠IN-SYSTEM PROGRAMMABLE
â 3.3V In-System Programmability (ISPâ¢) Using Boundary Scan Test Access Port (TAP)
â Open-Drain Output Option for Flexible Bus Interface Capability, Allowing Easy Implementation of Wired-OR or Bus Arbitration Logic
â Increased Manufacturing Yields, Reduced Time-toMarket and Improved Product Quality
â Reprogram Soldered Devices for Faster Prototyping
⢠100% IEEE 1149.1 BOUNDARY SCAN TESTABLE
⢠THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS
â Enhanced Pin Locking Capability
â Three Dedicated Clock Input Pins
â Synchronous and Asynchronous Clocks
â Programmable Output Slew Rate Control
â Flexible Pin Placement
â Optimized Global Routing Pool Provides Global Interconnectivity
⢠LEAD-FREE PACKAGE OPTIONS
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