ispLSI 5000V Description
The ispLSI 5000V Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs.
Features
⢠SuperWIDE HIGH-DENSITY IN-SYSTEM PROGRAMMABLE LOGIC
â 3.3V Power Supply
â User Selectable 3.3V/2.5V I/O
â 24000 PLD Gates / 512 Macrocells
â Up to 288 I/O Pins
â 512 Registers
â High-Speed Global Interconnect
â SuperWIDE 32 Generic Logic Block (GLB) Size for Optimum Performance
â SuperWIDE Input Gating (68 Inputs) for Fast Counters, State Machines, Address Decoders, etc.
â PCB Efficient Ball Grid Array (BGA) Package Options
â Interfaces with Standard 5V TTL Devices
⢠HIGH PERFORMANCE E2CMOS® TECHNOLOGY
â fmax = 110 MHz Maximum Operating Frequency
â tpd = 8.5 ns Propagation Delay
â Enhanced tsu2 = 7 ns, tsu3 (CLK0/1) = 4.5ns, tsu3 (CLK2/3) = 3.5ns
â TTL/3.3V/2.5V Compatible Input Thresholds and Output Levels
â Electrically Erasable and Reprogrammable
â Non-Volatile
â Programmable Speed/Power Logic Path Optimization
⢠IN-SYSTEM PROGRAMMABLE
â Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality
â Reprogram Soldered Devices for Faster Debugging
⢠100% IEEE 1149.1 BOUNDARY SCAN TESTABLE AND 3.3V IN-SYSTEM PROGRAMMABLE
⢠ARCHITECTURE FEATURES
â Enhanced Pin-Locking Architecture with SingleLevel Global Routing Pool and SuperWIDE GLBs
â Wrap Around Product Term Sharing Array Supports up to 35 Product Terms Per Macrocell
â Macrocells Support Concurrent Combinatorial and Registered Functions
â Macrocell Registers Feature Multiple Control Options Including Set, Reset and Clock Enable
â Four Dedicated Clock Input Pins Plus Macrocell Product Term Clocks
â Slew and Skew Programmable I/O (SASPI/Oâ¢) Supports Programmable Bus Hold, Pull-up, Open Drain and Slew and Skew Rate Options
â Six Global Output Enable Terms, Two Global OE Pins and One Product Term OE per Macrocell
⢠ispDesignEXPERT⢠â LOGIC COMPILER AND COMPLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
â Superior Quality of Results
â Tightly Integrated with Leading CAE Vendor Tools
â Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZERâ¢
â PC and UNIX Platforms
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