Description
The PDM41256 is a high-performance CMOS static RAM organized as 32,768 x 8 bits. Writing to this
device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW.
Reading is accomplished when WEremains HIGH and CEand OEare both LOW.
The PDM41256 operates from a single +5V power supply and all the inputs and outputs are fully TTL compatible. The PDM41256 comes in two versions: the standard power version PDM41256SA and the low power version PDM41256LA. Both versions are functionally the same and differ only in their power consumption.
The PDM41256 is available in a 28-pin plastic TSOP (I) and a 28-pin 300-mil plastic SOJ.

Features
High-speed access times
  Com’l: 7, 8, 10, 12 and 15ns
  Ind’l: 8, 10, 12 and 15ns(use 15ns for slower designs)
Low power operation (typical)
- PDM41256SA
  Active: 475 mW
  Standby: 100 mW
- PDM41256LA
  Active: 425mW
  Standby: 25 mW
Single +5V (±10%) power supply
TTL-compatible inputs and outputs
Packages
Plastic SOJ (300 mil) - SO
Plastic TSOP (I) - T