DEVICE OVERVIEW
This document contains device-specific information for the following devices:
⢠PIC18F25K80 ⢠PIC18LF25K80
⢠PIC18F26K80 ⢠PIC18LF26K80
⢠PIC18F45K80 ⢠PIC18LF45K80
⢠PIC18F46K80 ⢠PIC18LF46K80
⢠PIC18F65K80 ⢠PIC18LF65K80
⢠PIC18F66K80 ⢠PIC18LF66K80
This family combines the traditional advantages of all PIC18 microcontrollers â namely, high computational performance and a rich feature set â with an extremely competitive price point. These features make the PIC18F66K80 family a logical choice for many high-performance applications where price is a primary consideration.
Power-Managed Modes:
⢠Run: CPU on, Peripherals on
⢠Idle: CPU off, Peripherals on
⢠Sleep: CPU off, Peripherals off
⢠Two-Speed Oscillator Start-up
⢠Fail-Safe Clock Monitor (FSCM)
⢠Power-Saving Peripheral Module Disable (PMD)
⢠Ultra Low-Power Wake-up
⢠Fast Wake-up, 1 ïs, Typical
⢠Low-Power WDT, 300 nA, Typical
⢠Run mode Currents Down to Very Low 3.8 ïA, Typical
⢠Idle mode Currents Down to Very Low 880 nA, Typical
⢠Sleep mode Current Down to Very Low 13 nA, Typical
ECAN Bus Module Features:
⢠Conforms to CAN 2.0B Active Specification
⢠Three Operating modes:
- Legacy mode (full backward compatibility with existing PIC18CXX8/FXX8 CAN modules)
- Enhanced mode
- FIFO mode or programmable TX/RX buffers
⢠Message Bit Rates up to 1 Mbps
⢠DeviceNet⢠Data Byte Filter Support
⢠Six Programmable Receive/Transmit Buffers
⢠Three Dedicated Transmit Buffers with Prioritization
⢠Two Dedicated Receive Buffers
⢠16 Full, 29-Bit Acceptance Filters with Dynamic Association
⢠Three Full, 29-Bit Acceptance Masks
⢠Automatic Remote Frame Handling
⢠Advanced Error Management Features
Special Microcontroller Features:
⢠Operating Voltage Range: 1.8V to 5.5V
⢠On-Chip 3.3V Regulator
⢠Operating Speed up to 64 MHz
⢠Up to 64 Kbytes On-Chip Flash Program Memory:
- 10,000 erase/write cycle, typical
- 20 years minimum retention, typical
⢠1,024 Bytes of Data EEPROM:
- 100,000 Erase/write cycle data EEPROM memory, typical
⢠3.6 Kbytes of General Purpose Registers (SRAM)
⢠Three Internal Oscillators: LF-INTOSC (31 KHz), MF-INTOSC (500 kHz) and HF-INTOSC (16 MHz)
⢠Self-Programmable under Software Control
⢠Priority Levels for Interrupts
⢠8 x 8 Single-Cycle Hardware Multiplier
⢠Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 4,194s
⢠In-Circuit Serial Programming⢠(ICSPâ¢) via Two Pins
⢠In-Circuit Debug via Two Pins
⢠Programmable BOR
⢠Programmable LVD
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