PRODUCT DESCRIPTION
The SST39VF160x and SST39VF320x devices are 1M x16 and 2M x16, respectively, CMOS Multi-Purpose Flash Plus (MPF+) manufactured with SSTâs proprietary, high performance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST39VF160x/320x write (Program or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pinouts for x16 memories.
Featuring high performance Word-Program, the SST39VF160x/320x devices provide a typical Word-Program time of 7 µsec. These devices use Toggle Bit or Data# Polling to indicate the completion of Program operation. To protect against inadvertent write, they have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with a guaranteed typical endurance of 100,000 cycles. Data retention is rated at greater than 100 years.
FEATURES:
⢠Organized as
1M x16: SST39VF1601/1602
2M x16: SST39VF3201/3202
⢠Single Voltage Read and Write Operations
â 2.7-3.6V
⢠Superior Reliability
â Endurance: 100,000 Cycles (Typical)
â Greater than 100 years Data Retention
⢠Low Power Consumption (typical values at 5 MHz)
â Active Current: 9 mA (typical)
â Standby Current: 3 µA (typical)
â Auto Low Power Mode: 3 µA (typical)
⢠Hardware Block-Protection/WP# Input Pin
â Top Block-Protection (top 32 KWord)
for SST39VF1602/3202
â Bottom Block-Protection (bottom 32 KWord)
for SST39VF1601/3201
⢠Sector-Erase Capability
â Uniform 2 KWord sectors
⢠Block-Erase Capability
â Uniform 32 KWord blocks
⢠Chip-Erase Capability
⢠Erase-Suspend/Erase-Resume Capabilities
⢠Hardware Reset Pin (RST#)
⢠Security-ID Feature
â SST: 128 bits; User: 128 bits
⢠Fast Read Access Time:
â 70 ns
⢠Latched Address and Data
⢠Fast Erase and Word-Program:
â Sector-Erase Time: 18 ms (typical)
â Block-Erase Time: 18 ms (typical)
â Chip-Erase Time: 40 ms (typical)
â Word-Program Time: 7 µs (typical)
⢠Automatic Write Timing
â Internal VPP Generation
⢠End-of-Write Detection
â Toggle Bits
â Data# Polling
⢠CMOS I/O Compatibility
⢠JEDEC Standard
â Flash EEPROM Pinouts and command sets
⢠Packages Available
â 48-lead TSOP (12mm x 20mm)
â 48-ball TFBGA (6mm x 8mm)
⢠All non-Pb (lead-free) devices are RoHS compliant
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