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LM3S2965 Datasheet - ETC2

Part Name
Description
MFG CO.
LM3S2965
ETC2
ETC2 ETC2
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[Luminary Micro, Inc.]

Architectural Overview
The Luminary Micro Stellaris® family of microcontrollers—the first ARM® Cortex™-M3 based controllers—brings high-performance 32-bit computing to cost-sensitive embedded microcontroller applications. These pioneering parts deliver customers 32-bit performance at a cost equivalent to legacy 8- and 16-bit devices, all in a package with a small footprint.
The Stellaris® family offers efficient performance and extensive integration, favorably positioning the device into cost-conscious applications requiring significant control-processing and connectivity capabilities. The Stellaris® LM3S1000 series extends the Stellaris® family with larger on-chip memories, enhanced power management, and expanded I/O and control capabilities. The Stellaris® LM3S2000 series, designed for Controller Area Network (CAN) applications, extends the Stellaris family with Bosch CAN networking technology, the golden standard in short-haul industrial networks.

Product Features
The LM3S2965 microcontroller includes the following product features:
■ 32-Bit RISC Performance
    – 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
    – System timer (SysTick), providing a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism
    – Thumb®-compatible Thumb-2-only instruction set processor core for high code density
    – 50-MHz operation
    – Hardware-division and single-cycle-multiplication
    – Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
    – 42 interrupts with eight priority levels
    – Memory protection unit (MPU), providing a privileged mode for protected operating system functionality
    – Unaligned data access, enabling data to be efficiently packed into memory
    – Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined peripheral control
■ Internal Memory
    – 256 KB single-cycle flash
        • User-managed flash block protection on a 2-KB block basis
        • User-managed flash data programming
        • User-defined and managed flash-protection block
    – 64 KB single-cycle SRAM
■ General-Purpose Timers
    – Four General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers. Each GPTM can be configured to operate independently:
        • As a single 32-bit timer
        • As one 32-bit Real-Time Clock (RTC) to event capture
        • For Pulse Width Modulation (PWM)
        • To trigger analog-to-digital conversions
        – 32-bit Timer modes
        • Programmable one-shot timer
        • Programmable periodic timer
        • Real-Time Clock when using an external 32.768-KHz clock as the input
        • User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Timer modes
        • General-purpose timer function with an 8-bit prescaler
        • Programmable one-shot timer
        • Programmable periodic timer
        • User-enabled stalling when the controller asserts CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Input Capture modes
        • Input edge count capture
        • Input edge time capture
    – 16-bit PWM mode
        • Simple PWM mode with software-programmable output inversion of the PWM signal
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