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Description : 512K x 8 SRAM

512K x 8 SRAM

Description : 512K x 8 SRAM

PLASTIC PLUS™ FEATURES
■ Access Times of 15, 20, 25ns
■ Standard Commercial Off-The-Shelf (COTS) Memory Devices for Extended Temperature Range
■ JEDEC Standard 36 pin Plastic SOJ Package
■ Electrical and Speed Characteristics for:
   • Military Temperature (-55°C to +125°C)
   • Industrial Temperature (-40°C to +85°C)
■ Burn-in and Temperature Cycling Available
■ Organized as 512K x 8
■ Center Power/Ground Pins (Revolutionary)
■ 5 Volt Power Supply
■ Low Power ("L") Version Available
■ Battery Back-Up Operation
■ Reliability Test Data Available:
   • High Temperature Operating Life
   • High Temperature Storage
   • Pressure Cooker Test
   • Wet High Temperature Operating Life
   • Thermal Shock
   • Temperature Cycling

Description : 512K x 8 SRAM

INTRODUCTION

The QCOTSTM UT8Q512 Quantified Commercial Off-the Shelf product is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (E), an active LOWOutput Enable (G), and three-state drivers. This device has a power-down feature that reduces power consumption by more than 90% when deselected.

Writing to the device i s accomplished by taking Chip Enable one (E) input LOW and Write Enable (W) inputs LOW. Data on the eight I/O pins (DQ0 through DQ7) is then written into the location specified on the address pins (A0 through A 18). Reading from the device is accomplished by taking Chip Enable one (E) and Output Enable (G) LOW while forcing Write Enable (W) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (DQ0 through DQ7) are placed in a high impedance state when the device is deselected (E, HIGH), the outputs are disabled (GHIGH), or during a write operation (E LOWand W LOW).



FEATURES

❐ 20ns (3.3 volt supply) maximum address access time

❐ Asynchronous operation for compatibility with industry standard 512K x 8 SRAMs

❐ TTL compatible inputs and output levels, three-state bidirectional data bus

❐ Typical radiation performance

   - Total dose: 50krads

   - >100krads(Si), for any orbit, using Aeroflex UTMC patented shielded package

   - SEL Immune >80 MeV-cm2/mg

   - LETTH(0.25) = >10 MeV-cm2/mg

   - Saturated Cross Section cm2 per bit, 5.0E-9

   - <1E-8 errors/bit-day, Adams 90% geosynchronous heavy ion

❐ Packaging options:

   - 36-lead ceramic flatpack (3.42 grams)

   - 36-lead flatpack shielded (10.77 grams)

❐ Standard Microcircuit Drawing5962-99607

   - QML T and Q compliant



 


Description : 512K x 8 SRAM SRAM MEMORY ARRAY

GENERAL DESCRIPTION
The AS5C4008 is a 4 megabit monolithic CMOS SRAM, organized as a 512K x 8.
The evolutionary 32 pin device allows for easy upgrades from the 1 meg SRAM.

FEATURES
• High Speed: 17, 20, 25, 35 and 45ns
• High-performance, low power military grade device
• Single +5V ±10% power supply
• Easy memory expansion with CE and OE options
• All inputs and outputs are TTL-compatible
• Ease of upgradability from 1 Meg using the 32 pin evolutionary version.

Description : 512K x 8 SRAM SRAM MEMORY ARRAY

GENERAL DESCRIPTION
The AS5C4008 is a 4 megabit monolithic CMOS SRAM, organized as a 512K x 8.
The evolutionary 32 pin device allows for easy upgrades from the 1 meg SRAM.

FEATURES
• High Speed: 12, 15, 17, 20, 25, 35 and 45ns
• High-performance, low power military grade device
• Single +5V ±10% power supply
• Easy memory expansion with CE and OE options
• All inputs and outputs are TTL-compatible
• Ease of upgradability from 1 Meg using the 32 pin evolutionary version

Description : 512K x 32 SRAM SRAM MEMORY ARRAY

GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8S512K32 and AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as 512Kx32 bits. These devices achieve high speed access, low power consumption and high reliability by employing advanced CMOS memory technology.

FEATURES
• Operation with single 5V supply
• High speed: 12, 15, 17, 20, 25 and 35ns
• Built in decoupling caps for low noise
• Organized as 512Kx32 , byte selectable
• Low power CMOS
• TTL Compatible Inputs and Outputs
• Future offerings
   3.3V Power Supply


Description : 512K x 8 SRAM SRAM MEMORY ARRAY

GENERAL DESCRIPTION
The AS5C4008 is a 4 megabit monolithic CMOS SRAM, organized as a 512K x 8.
The evolutionary 32 pin device allows for easy upgrades from the 1 meg SRAM.

FEATURES

• High Speed: 17, 20, 25, 35 and 45ns

• High-performance, low power military grade device

• Single +5V ±10% power supply

• Easy memory expansion with CE and OE options

• All inputs and outputs are TTL-compatible

• Ease of upgradability from 1 Meg using the 32 pin evolutionary version.


Description : 512K x 32 SRAM SRAM MEMORY ARRAY

GENERAL DESCRIPTION

The Austin Semiconductor, Inc. AS8S512K32 and AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as 512Kx32 bits. These devices achieve high speed access, low power consumption and high reliability by employing advanced CMOS memory technology.



FEATURES

• Operation with single 5V supply

• High speed: 12, 15, 17, 20, 25 and 35ns

• Built in decoupling caps for low noise

• Organized as 512Kx32 , byte selectable

• Low power CMOS

• TTL Compatible Inputs and Outputs

• Future offerings

   3.3V Power Supply


Description : Standard Pitch DIP Adapters

[Accutek]

FEATURES
• Saves costly redesign of current motherboards
• Fully tested with lifetime limited warranty
• May include an on board decoupling capacitor
• IC assembly and testing available
• EPROM and Flash programming available
• Custom lead lengths available
• Custom multi-chip and double-sided modules available

Description : 3.3V 512K × 8 CMOS SRAM

Features

• Pin compatible to AS7C34096

• Industrial and commercial temperature

• Organization: 524,288 words × 8 bits

• Center power and ground pins

• High speed

- 10/12/15/20 ns address access time

- 4/5/6/7 ns output enable access time

• Low power consumption: ACTIVE

- 650 mW / max @ 10 ns

• Low power consumption: STANDBY

- 28.8 mW / max CMOS

• Equal access and cycle times

• Easy memory expansion with CE, OE inputs

• TTL-compatible, three-state I/O

• JEDEC standard packages

- 400 mil 36-pin SOJ

- 44-pin TSOP 2

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA


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