■ Features 1. Broad Variations of Stacking Height In addition to 0.5mm pitch ultra-miniature size connector, the stacking height of 3mm, 3.5mm, 4mm, and 5mm are provided. 2. Corresponding to Automatic Mounting The connector has the vacuum pick-up area to enable automatic mounting with the embossed tape packaging. 3. Metal Fitting Available The product including the metal fitting to prevent solder peeling is provided, considering the mounting on FPC.
■ Applications Mobile phone, LCD(Liquid Crystal Display), MO(Optical Disk), Note PC
■ Features 1. Ease of Use and Space Savings Only one finger or 6.9N (Newtons) of force is required to lock Hirose’s rotational actuator (flip-lock) as compared to using 2 fingers and 39.2N to close a FFC/FPC connector from our competition. The Flip-Lock design also allows customers to place 2 or more connectors side by side as there is no need to waste additional board space for a side latch. 2. Strengthened Flip-lock Actuator The standard Flip-Lock requires only 2.0mm height above the board. A strengthened lock lever is available which only requires an additional 0.4mm. 3. Supports Thin FPC (0.18mm) Hirose does not require double-sided FPC to have any additional strengthening plate or stiffener and can therefore support a thickness of as little as 0.18mm +/-0.05. 4. Hirose Ensures Reliability Hirose’s patented half tuning fork contacts maintain the required normal force without relying on the connector housing. With our competitor’s conventional products the housing walls support the contact force, which does not provide for long-term reliability. 5. Prevention of Solder Bridge Excess solder cavity absorbs excessive solder and avoids solder bridging. 6. Three different assembly types FH12 is offered in Top & Bottom Contact and Vertical Mount and offered in both a 0.5mm contact pitch as well as a 1.0mm contact pitch (bottom contact only).
Description: Small SMD OCXO with tight stability. AT and SC-cut versions available.
Features • 5 MHz, 10 MHz, 13 MHz standard. Other frequencies available from 2 to 80 MHz • Stability as low as ±5 x 10-8 over 0°C to 50°C • Aging: 1 x 10-9 per day • Package: 25.4 x 22 x 10.5 mm • Supply voltage: +3.3 or +5.0 V
EFC Series 1313 are metallized polyester capacitors. This series offers the advantage of small size, self healing and low cost. Suggested applications include: medical electronics, telecommunications and high voltage Power supplies. Packaging options include: wrap and fill (TF, TC), radial lead box (EFR), axial lead (EC, EF). Application options include: high voltage (HV), "AC" across the line (AC), noise suppression (RC) and switching Power supply (SP).
1. TEMPERATURE RANGE - 55 °C to + 85 °C at rated voltage. To 125 °C at 50% derating. 2. CAPACITANCE Capacitors < 1.0 MFD shall be measured at 1 KHz + 20 HZ. Capacitors >1.0 MFD shall be measured at 120 HZ. Measurements shall be taken at 25 °C. 3. DIELECTRIC STRENGTH At 25 °C, 150% of rated voltage when applied terminal to terminal for one minute through a current limiting resistance. 4. INSULATION RESISTANCE At 25 °C after 2 minutes charge time at rated voltage or 500 VDC, whichever is less, the minimum IR shall be 30,000 Megohm-Microfarad, but need not exceed 50,000 Megohms for voltages greater than 50 VDC, and 15,000 Megohm-Microfarads, but need not exceed 30,000 Megohms for 50 VDC or less. 5. HUMIDITY RESISTANCE Series 1313 shall meet the requirements of MIL-STD. 202C, Method 103B. 6. DISSIPATION FACTOR Shall be 1.0 % max. when measured as in Par. 2. 7. LIFE TEST Will withstand the application of 150% rated voltage at +125 °C for 250 hours with not more than one failure in 12 permitted.
General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence.
Features: • Intel PC-100 (3-3-3) or PC133 (3-3-3) compatible • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access precharge time • Programmable burst lengths: 1, 2, or 4 using Interleaved Burst Addressing • Auto Precharge and Auto Refresh modes • 64ms, 4,096-cycle refresh quad-row refresh, (15.6ms/row) • Self Refresh mode 1 • LVTTL-compatible inputs and outputs • Single +3.3V ±0.3V Power supply • The x16 devices are optimized for both single and dual rank DIMM applications. The x8 devices are optimized for single rank DIMM applications.