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Description : MicroController

[Luminary Micro, Inc.]

Architectural Overview
The Luminary Micro Stellaris® family of MicroControllers—the first ARM® Cortex™-M3 based controllers—brings high-performance 32-bit computing to cost-sensitive embedded MicroController applications. These pioneering parts deliver customers 32-bit performance at a cost equivalent to legacy 8- and 16-bit devices, all in a package with a small footprint.
The Stellaris® family offers efficient performance and extensive integration, favorably positioning the device into cost-conscious applications requiring significant control-processing and connectivity capabilities. The Stellaris® LM3S1000 series extends the Stellaris® family with larger on-chip memories, enhanced power management, and expanded I/O and control capabilities. The Stellaris® LM3S2000 series, designed for Controller Area Network (CAN) applications, extends the Stellaris family with Bosch CAN networking technology, the golden standard in short-haul industrial networks.

Product Features
The LM3S2965 MicroController includes the following product features:
■ 32-Bit RISC Performance
    – 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
    – System timer (SysTick), providing a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism
    – Thumb®-compatible Thumb-2-only instruction set processor core for high code density
    – 50-MHz operation
    – Hardware-division and single-cycle-multiplication
    – Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
    – 42 interrupts with eight priority levels
    – Memory protection unit (MPU), providing a privileged mode for protected operating system functionality
    – Unaligned data access, enabling data to be efficiently packed into memory
    – Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined peripheral control
■ Internal Memory
    – 256 KB single-cycle flash
        • User-managed flash block protection on a 2-KB block basis
        • User-managed flash data programming
        • User-defined and managed flash-protection block
    – 64 KB single-cycle SRAM
■ General-Purpose Timers
    – Four General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers. Each GPTM can be configured to operate independently:
        • As a single 32-bit timer
        • As one 32-bit Real-Time Clock (RTC) to event capture
        • For Pulse Width Modulation (PWM)
        • To trigger analog-to-digital conversions
        – 32-bit Timer modes
        • Programmable one-shot timer
        • Programmable periodic timer
        • Real-Time Clock when using an external 32.768-KHz clock as the input
        • User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Timer modes
        • General-purpose timer function with an 8-bit prescaler
        • Programmable one-shot timer
        • Programmable periodic timer
        • User-enabled stalling when the controller asserts CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Input Capture modes
        • Input edge count capture
        • Input edge time capture
    – 16-bit PWM mode
        • Simple PWM mode with software-programmable output inversion of the PWM signal
(Continue ...)

Description : MicroController

[Luminary Micro, Inc.]

Architectural Overview
The Luminary Micro Stellaris® family of MicroControllers—the first ARM® Cortex™-M3 based controllers—brings high-performance 32-bit computing to cost-sensitive embedded MicroController applications. These pioneering parts deliver customers 32-bit performance at a cost equivalent to legacy 8- and 16-bit devices, all in a package with a small footprint.
The LM3S611 controller in the Stellaris family offers the advantages of ARM’s widely available development tools, System-on-Chip (SoC) infrastructure IP applications, and a large user community. Additionally, the controller uses ARM’s Thumb®-compatible Thumb-2 instruction set to reduce memory requirements and, thereby, cost.
Luminary Micro offers a complete solution to get to market quickly, with a customer development board, white papers and application notes, and a strong support, sales, and distributor network.

Product Features
The LM3S611 MicroController includes the following product features:
■ 32-Bit RISC Performance
    – 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
    – System timer (SysTick) provides a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism
    – Thumb®-compatible Thumb-2-only instruction set processor core for high code density
    – 50-MHz operation
    – Hardware-division and single-cycle-multiplication
    – Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
    – 26 interrupts with eight priority levels
    – Memory protection unit (MPU) provides a privileged mode for protected operating system functionality
    – Unaligned data access, enabling data to be efficiently packed into memory
    – Atomic bit manipulation (bit-banding) delivers maximum memory utilization and streamlined peripheral control
■ Internal Memory
    – 32-KB single-cycle flash
        • User-managed flash block protection on a 2-KB block basis
        • User-managed flash data programming
        • User-defined and managed flash-protection block
    – 8-KB single-cycle SRAM
■ General-Purpose Timers
    – Three timers, each of which can be configured: as a single 32-bit timer, as two 16-bit timers, or to initiate an ADC event
    – 32-bit Timer modes:
        • Programmable one-shot timer
        • Programmable periodic timer
        • Real-Time Clock when using an external 32.768-KHz clock as the input
        • User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Timer modes:
        • General-purpose timer function with an 8-bit prescaler
        • Programmable one-shot timer
        • Programmable periodic timer
        • User-enabled stalling when the controller asserts CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Input Capture modes:
        • Input edge count capture
        • Input edge time capture
    – 16-bit PWM mode:
        • Simple PWM mode with software-programmable output inversion of the PWM signal
(Continue ...)

Description : MicroController

[Luminary Micro, Inc.]

Architectural Overview
The Luminary Micro Stellaris™ family of MicroControllers—the first ARM® Cortex™-M3 based controllers—brings high-performance 32-bit computing to cost-sensitive embedded MicroController applications. These pioneering parts deliver customers 32-bit performance at a cost equivalent to legacy 8- and 16-bit devices, all in a package with a small footprint.

Product Features
The LM3S801 MicroController includes the following product features:
■ 32-Bit RISC Performance
    – 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
    – Thumb®-compatible Thumb-2-only instruction set processor core for high code density
    – 50-MHz operation
    – Hardware-division and single-cycle-multiplication
    – Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
    – 26 interrupts with eight priority levels
    – Memory protection unit (MPU) provides a privileged mode for protected operating system functionality
    – Unaligned data access, enabling data to be efficiently packed into memory
    – Atomic bit manipulation (bit-banding) delivers maximum memory utilization and streamlined peripheral control
■ Internal Memory
    – 64 KB single-cycle flash
        • User-managed flash block protection on a 2-KB block basis
        • User-managed flash data programming
        • User-defined and managed flash-protection block
    – 8 KB single-cycle SRAM
■ General-Purpose Timers
    – Three timers, each of which can be configured as a single 32-bit timer or as two 16-bit timers
    – 32-bit Timer modes:
        • Programmable one-shot timer
        • Programmable periodic timer
        • Real-Time Clock when using an external 32.768-KHz clock as the input
        • User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU Halt flag during debug
    – 16-bit Timer modes:
        • General-purpose timer function with an 8-bit prescaler
        • Programmable one-shot timer
        • Programmable periodic timer
        • User-enabled stalling when the controller asserts CPU Halt flag during debug
    – 16-bit Input Capture modes:
        • Input edge count capture
        • Input edge time capture
    – 16-bit PWM mode:
        • Simple PWM mode with software-programmable output inversion of the PWM signal
■ ARM FiRM-compliant Watchdog Timer
    – 32-bit down counter with a programmable load register
    – Separate watchdog clock with an enable
    – Programmable interrupt generation logic with interrupt masking
    – Lock register protection from runaway software
    – Reset generation logic with an enable/disable
    – User-enabled stalling when the controller asserts the CPU Halt flag during debug
■ Synchronous Serial Interface (SSI)
    – Master or slave operation
    – Programmable clock bit rate and prescale
    – Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
    – Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces
    – Programmable data frame size from 4 to 16 bits
    – Internal loopback test mode for diagnostic/debug testing
■ UART
    – Two fully programmable 16C550-type UARTs
    – Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service loading
    – Programmable baud-rate generator with fractional divider
    – Programmable FIFO length, including 1-byte deep operation providing conventional double-buffered interface
    – FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
    – Standard asynchronous communication bits for start, stop, and parity
    – False-start-bit detection
    – Line-break generation and detection
(Continue ...)

Target Applications
■ Factory automation and control
■ Industrial control power devices
■ Building and home automation
■ Brushless DC and AC induction motors

Description : MicroController

[LUMINARY MICRO]

Architectural Overview
The Luminary Micro Stellaris® family of MicroControllers—the first ARM® Cortex™-M3 based controllers—brings high-performance 32-bit computing to cost-sensitive embedded MicroController applications. These pioneering parts deliver customers 32-bit performance at a cost equivalent to legacy 8- and 16-bit devices, all in a package with a small footprint.

Product Features
The LM3S817 MicroController includes the following product features:
■ 32-Bit RISC Performance
    – 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
    – System timer (SysTick) provides a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism
    – Thumb®-compatible Thumb-2-only instruction set processor core for high code density
    – 50-MHz operation
    – Hardware-division and single-cycle-multiplication
    – Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
    – 26 interrupts with eight priority levels
    – Memory protection unit (MPU) provides a privileged mode for protected operating system functionality
    – Unaligned data access, enabling data to be efficiently packed into memory
    – Atomic bit manipulation (bit-banding) delivers maximum memory utilization and streamlined peripheral control
■ Internal Memory
    – 64-KB single-cycle flash
        • User-managed flash block protection on a 2-KB block basis
        • User-managed flash data programming
        • User-defined and managed flash-protection block
    – 8-KB single-cycle SRAM
■ General-Purpose Timers
    – Three timers, each of which can be configured: as a single 32-bit timer, as two 16-bit timers, or to initiate an ADC event
    – 32-bit Timer modes:
        • Programmable one-shot timer
        • Programmable periodic timer
        • Real-Time Clock when using an external 32.768-KHz clock as the input
        • User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Timer modes:
        • General-purpose timer function with an 8-bit prescaler
        • Programmable one-shot timer
        • Programmable periodic timer
        • User-enabled stalling when the controller asserts CPU Halt flag during debug
        • ADC event trigger
    – 16-bit Input Capture modes:
        • Input edge count capture
        • Input edge time capture
    – 16-bit PWM mode:
        • Simple PWM mode with software-programmable output inversion of the PWM signal
■ ARM FiRM-compliant Watchdog Timer
    – 32-bit down counter with a programmable load register
    – Separate watchdog clock with an enable
    – Programmable interrupt generation logic with interrupt masking
    – Lock register protection from runaway software
    – Reset generation logic with an enable/disable
    – User-enabled stalling when the controller asserts the CPU Halt flag during debug
■ Synchronous Serial Interface (SSI)
    – Master or slave operation
    – Programmable clock bit rate and prescale
    – Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
    – Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces
    – Programmable data frame size from 4 to 16 bits
    – Internal loopback test mode for diagnostic/debug testing
■ UART
    – Two fully programmable 16C550-type UARTs
    – Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service loading
    – Programmable baud-rate generator with fractional divider
    – Programmable FIFO length, including 1-byte deep operation providing conventional double-buffered interface
    – FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
    – Standard asynchronous communication bits for start, stop, and parity
    – False-start-bit detection
    – Line-break generation and detection
(Continue ...)

Freescale Semiconductor
Freescale Semiconductor
Description : MicroController

MPC5646C MicroController



Description

The MPC5646C is a new family of next generation MicroControllers built on the Power Architecture embedded category. This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the device.

The MPC5646C family expands the range of the MPC560xB MicroController family. It provides the scalability needed to implement platform approaches and delivers the performance required by increasingly sophisticated software architectures. The advanced and cost-efficient host processor core of the MPC5646C automotive controller family complies with the Power Architecture embedded category, which is 100 percent user-modecompatible with the original Power Architecture user instruction set architecture (UISA). It operates at speeds of up to 120 MHz and offers high performance processing optimized for low power consumption. It also capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users  implementations.



• e200z4d dual issue, 32-bit core Power Architecture compliant CPU

– Up to 120 MHz

– 4 KB, 2/4-Way Set Associative Instruction Cache

– Variable length encoding (VLE)

– Embedded floating-point (FPU) unit

– Supports Nexus3+

• e200z0h single issue, 32-bit core Power Architecture compliant CPU

– Up to 80 MHz

– Variable length encoding (VLE)

– Supports Nexus3+

• Up to 3 MB on-chip flash memory: flash page buffers to improve access time

• Up to 256 KB on-chip SRAM

• 64 KB on-chip data flash memory to support EEPROM emulation

• Up to 16 semaphores across all slave ports

• User selectable MBIST

• Low-power modes supported: STOP, HALT, STANDBY

• 16 region Memory Protection Unit (MPU)

• Dual-core Interrupt Controller (INTC). Interrupt sources can be routed to e200z4d, e200z0h, or both

• Frequency-Modulated Phase-Locked Loop (FMPLL)

• Crossbar switch architecture for concurrent access to peripherals, flash memory, and SRAM from multiple bus masters

• 32 channel eDMA controller with DMAMUX

• Timer supports input/output channels providing 16-bit input capture, output compare, and PWM functions(eMIOS)

• 2 analog-to-digital converters(ADC): one 10-bit and one 12-bit

• Cross Trigger Unit (CTU) to enable synchronization of ADC conversions with a timer event from the eMIOS or from the PIT

• Up to 8 serial peripheral interface (DSPI) modules

• Up to 10 serial communication interface (LINFlex) modules

• Up to 6 full CAN (FlexCAN) modules with 64 MBs each

• CAN Sampler to catch ID of CAN message

• 1 inter IC communication interface (I2C) module

• Up to 177 (LQFP) or 199 (BGA) configurable general purpose I/O pins

• System clocks sources

– 4–40 MHz external crystal oscillator

– 16 MHz internal RC oscillator

– FMPLL Additionally, there are two low power oscillators: 128 kHz internal RC oscillator, 32 kHz external crystal oscillator

• Real Time Counter (RTC) with clock source from internal

128 kHz or 16 MHz oscillators or external 4–40 MHz crystal

– Supports autonomous wake-up with 1 ms resolution with max timeout of 2 seconds

– Optional support from external 32 kHz crystal oscillator, supporting wake-up with 1 second resolution and max timeout of 1 hour

• 1 System Timer Module (STM) with four 32-bit compare channels

• Up to 8 periodic interrupt timers (PIT) with 32-bit counter resolution

• 1 Real Time Interrupt (RTI) with 32-bit counter resolution

• 1 Safety Enhanced Software Watchdog Timer (SWT) that supports keyed functionality

• 1 dual-channel FlexRay Controller with 128 message buffers

• 1 Fast Ethernet Controller (FEC)

• On-chip voltage regulator (VREG)

• Cryptographic Services Engine (CSE)

• Offered in the followingstandard package types:

–176-pin LQFP, 2424 mm, 0.5 mm Lead Pitch

–208-pin LQFP, 2828 mm, 0.5 mm Lead Pitch

– 256-ball MAPBGA, 1717mm, 1.0 mm Lead Pitch



 


Part Name(s) : HTG12G0
Holtek Semiconductor
Holtek Semiconductor
Description : MicroController

General Description
The HTG12G0 is a 4-bit single chip MicroController specially designed for LCD product applications. It is ideally suited for applications requiring
low power consumption, with many LCD segments such as calculator, scale, subsystem controller, hand-held LCD products and electronic appliances.

Features
• Operating voltage: 2.4V~3.3V
• Eight input lines
• Two output lines
• Five working registers
• RC oscillator for system clock
• Crystal oscillator for RTC and LCD clock
• 8K×8 program ROM
• 156×4 data RAM
• 50×8 segment LCD driver, 1/5 bias, 1/8 duty
• 8-bit programmable timer with built-in frequency source
• Internal timer overflow and RTC interrupt
• 16 kinds of programmable sound effects
• Halt function and wake-up feature reduce power consumption
• One-level subroutine nesting
• 8-bit table read instruction
• Up to 4.0µs instruction cycle with 1.0MHz system clock at VDD=3V
• 95 powerful instructions

Part Name(s) : 73M2910L
TDK Corporation
TDK Corporation
Description : MicroController

DESCRIPTION

The 73M2910L high performance micro-controller is based on the industry standard 8-bit 8032

implemented in an advanced submicron CMOS process. The processor has the attributes of the

8032, including instruction cycle time, UART, timers, interrupts, 256 bytes of on-chip RAM and

programmable I/O. The architecture has been optimized for low power portable modem or

communication applications by integrating unique features with the core CPU.



FEATURES

•  8032 compatible instruction set

•  44 MHz Operation from 3.3 to 5.5V

•  HDLC support logic (Packetizer, 16 and 32 CRC, zero ID)

•  24 pins for user programmable I/O ports

•  8 pins programmable chip select logic or I/O for memory mapped peripheral eliminating glue logic

•  3 external interrupt sources (programmable polarity)

•  16 dedicated latched address pins

•  Multiplexed data/address bus

•  Instruction cycle time identical to 8032

•  Buffered oscillator (or OSC/2) output pin

•  1.8432 MHz UART clock available

•  Bank select circuitry to support up to 128k of external program memory

•  Also available in 100-Lead QFP and 100-Pin PGA packages



 


Part Name(s) : MC68HC711E9XX
Freescale Semiconductor
Freescale Semiconductor
Description : MicroController
Unspecified
Unspecified
Description : MicroController

MicroController

Description : MicroController

Overview
The H8/3003 is a MicroController (MCU) that integrates system supporting functions together with an H8/300H CPU core having an original Hitachi architecture.

The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address space. Its instruction set is upward-compatible at the object-code level with the H8/300 CPU, enabling easy porting of software from the H8/300 Series.

The on-chip system supporting functions include RAM, a 16-bit integrated timer unit (ITU), a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication interface (SCI), an A/D converter, I/O ports, a direct memory access controller (DMAC), a refresh controller, and other facilities. Four MCU operating modes offer a choice of data bus width and address space size.

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