Parameter
tWR_CD_WRC
tWR_CD_PWA
tWR_CD_PWD
tADR_CD_WRS
tADR_CD_WRH
tDATA_CD_WRS
tDATA_CD_WRH
tACK_CD_WRD
tACK_CD_WROH
Table XXX. Host (Compressed Data) Write Timing Parameters
Description
WR Signal, Compressed Data Direct Register, Write Cycle Time
WR Signal, Compressed Data Direct Register, Pulsewidth Asserted
WR Signal, Compressed Data Direct Register, Pulsewidth Deasserted
ADR Bus, Compressed Data Direct Register, Write Setup
ADR Bus, Compressed Data Direct Register, Write Hold
DATA Bus, Compressed Data Direct Register, Write Setup
DATA Bus, Compressed Data Direct Register, Write Hold
ACK Signal, Compressed Data Direct Register, Write Delay
ACK Signal, Compressed Data Direct Register, Write Output Hold
ADV601LC
Min Max Unit
28
N/A ns
10
N/A ns
10
N/A ns
2
N/A ns
2
N/A ns
2
N/A ns
2
N/A ns
N/A 19
ns
9
N/A ns
(I) WR
(I) ADR, BE, CS
(I) DATA
tADR_CD_WRS
tWR_CD_WRC
tWR_CD_PWA
VALID
tWR_CD_PWD
t ADR_CD_WRH
VALID
VALID
VALID
(O) ACK
tDATA_CD_WRS tDATA_CD_WRH
tACK_CD_WRD
tACK_CD_WROH
Figure 31. Host (Compressed Data) Write Transfer Timing
REV. 0
–41–