MC80F0804D View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

MC80F0804D

8-BIT SINGLE-CHIP MICROCONTROLLERS

Unspecified 

MC80F0704/0708/0804/0808

14. ANALOG TO DIGITAL CONVERTER

The analog-to-digital converter (A/D) allows conversion of an

analog input signal to a corresponding 10-bit digital value. The A/

D module has sixteen analog inputs, which are multiplexed into

one sample and hold. The output of the sample and hold is the in-

put into the converter, which generates the result via successive

approximation.

The analog reference voltage is selected to VDD or AVref by set-

ting of the bit AVREFS in PSR1 register. If external analog ref-

erence AVref is selected, the analog input channel 0 (AN0)

should not be selected to use. Because this pin is used to an analog

reference of A/D converter.

The A/D module has three registers which are the control register

ADCM and A/D result register ADCRH and ADCRL. The AD-

CRH[7:6] is used as ADC clock source selection bits too. The

register ADCM, shown in Figure 14-4 , controls the operation of

the A/D converter module. The port pins can be configured as an-

alog inputs or digital I/O.

It is selected for the corresponding channel to be converted by

setting ADS[3:0]. The A/D port is set to analog input port by

ADEN and ADS[3:0] regardless of port I/O direction register.

The port unselected by ADS[3:0] operates as normal port.

Enable A/D Converter

A/D Input Channel Select

Conversion Source Clock Select

set to “1”. After one cycle, it is cleared by hardware. The register

ADCRH and ADCRL contains the results of the A/D conversion.

When the conversion is completed, the result is loaded into the

ADCRH and ADCRL, the A/D conversion status bit ADSF is set

to “1”, and the A/D interrupt flag ADCIF is set. See Figure 14-1

for operation flow.

The block diagram of the A/D module is shown in Figure 14-3 .

The A/D status bit ADSF is set automatically when A/D conver-

sion is completed, cleared when A/D conversion is in process.

The conversion time takes 13 times of conversion source clock.

The conversion source clock should selected for the conversion

time being more than 25μs.

A/D Converter Cautions

(1) Input range of AN0 ~ AN15

The input voltage of A/D input pins should be within the specifi-

cation range. In particular, if a voltage above VDD (or AVref) or

below VSS is input (even if within the absolute maximum rating

range), the conversion value for that channel can not be indeter-

minate. The conversion values of the other channels may also be

affected.

(2) Noise countermeasures

In order to maintain 10-bit resolution, attention must be paid to

noise on pins VDD (or AVref) and analog input pins (AN0 ~

AN15). Since the effect increases in proportion to the output im-

pedance of the analog input source, it is recommended in some

cases that a capacitor be connected externally as shown in Figure

14-2 in order to reduce noise. The capacitance is user-selectable

and appropriately determined according to the target system.

A/D Start (ADST = 1)

NOP

Analog

Input

0~1000pF

User Selectable

AN0~AN15

ADSF = 1

NO

YES

Read ADCR

Figure 14-1 A/D Converter Operation Flow

How to Use A/D Converter

The processing of conversion is start when the start bit ADST is

Figure 14-2 Analog Input Pin Connecting Capacitor

(3) I/O operation

The analog input pins AN0 ~ AN15 also have function as input/

output port pins. When A/D conversion is performed with any

pin, be sure not to execute a PORT input instruction with the se-

lected pin while conversion is in progress, as this may reduce the

conversion resolution.

Also, if digital pulses are applied to a pin adjacent to the pin in the

process of A/D conversion, the expected A/D conversion value

70

October 31, 2011 Ver 1.03

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