ST20-GP1 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST20-GP1

GPS PROCESSOR

STMicroelectronics 

ST20-GP1

An overall interrupt request signal (ASC_interrupt) is generated from the OR of the ErrorInterrupt

signal and the TxEmpty, TxBufEmpty and RxBufFull signals.

Note: the status register cannot be written directly by software. The reset mechanism for the status

register is described below.

The transmitter interrupt status bits (TxEmpty, TxBufEmpty) are reset when a character is written

to the transmitter buffer.

The receiver interrupt status bit (RxBufFull) is reset when a character is read from the receive

buffer.

The error status bits (ParityError, FrameError, OverrunError) are reset when a character is read

from the receive buffer.

78/116

&

RxBufFull

RxBufFullIE

TxEmpty

TxEmptyIE

&

&

TxBufEmpty

TxBufEmptyIE

Receive buffer

full interrupt

Transmitter

empty interrupt

Transmit buffer

empty interrupt

&

ParityError

ParityErrorIE

&

FrameError

FrameErrorIE

OverrunError

OverrunErrorIE

RESERVED

read 0, write 0

RESERVED

read 0, write 0

ASCStatus

register

ASCIntEnable

register

&

OR

Error interrupt

Figure 13.4 ASC status and interrupt registers

®

Share Link: