ST20-GP1
PIn register
The data read from this register will give the logic level present on an input pin at the start of the
read cycle to this register. The read data will be the last value written to the register irrespective of
the pin configuration selected.
PIn
Bit
Bit field
0
PIn0
1
PIn1
2
PIn2
3
PIn3
4
PIn4
5
PIn5
PIO port base address + #10
Function
Input data bit 0
Input data bit 1
Input data bit 2
Input data bit 3
Input data bit 4
Input data bit 5
Read only
Table 14.2 PIn register format
14.1.2 PIO bit configuration register
The PC1 register is used to configure each of the PIO port bits as an input or output. Writing a 0
configures the bit as an input, a 1 configures the bit as an output.
PC1
PIO port base address + #30
Bit
Bit field
Function
0
ConfigData0
Configures the PIO bit 0 as an input or an output.
1
ConfigData1
Configures the PIO bit 1 as an input or an output.
2
ConfigData2
Configures the PIO bit 2 as an input or an output.
3
ConfigData3
Configures the PIO bit 3 as an input or an output.
4
ConfigData4
Configures the PIO bit 4 as an input or an output.
5
ConfigData5
Configures the PIO bit 5 as an input or an output.
Read/Write
Table 14.3 PC1 register format
14.1.3 PIO Input compare and Compare mask registers
The input compare (PComp) register holds the value to which the input data from the PIO port pins
will be compared. If any of the input bits are different from the corresponding bits in the PComp
register, and the corresponding bit in the compare mask (PMask) register is set to 1, then the
internal interrupt signal for the port will be set to 1.
The compare function is sensitive to changes in levels on the pins and so the change in state on
the input pin must be greater in duration than the interrupt response time for the compare to be
seen as a valid interrupt by an interrupt service routine.
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