ADP3193AJCPZ-RL View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP3193AJCPZ-RL

8-Bit, Programmable, 2-Phase to 3-Phase, Synchronous Buck Controller

Analog Devices 

ADP3193A

Set the AC Load Line

1. Remove the dc load from the circuit and connect the

dynamic load.

2. Connect the scope to the output voltage and set it to dc-

coupling mode with the time scale of 100 μs/div.

3. Set the dynamic load for a transient step of about 40 A at

1 kHz with 50% duty cycle.

4. Measure the output waveform. (Note that use of a dc offset

on the scope may be necessary to see the waveform.) Try to

use a vertical scale of 100 mV/div or finer. This waveform

should look similar to Figure 15.

one minor undershoot before achieving the final desired

value after VDROOP (see Figure 16).

VDROOP

VTRAN1

VTRAN2

VACDRP

VDCDRP

Figure 15. AC Load Line Waveform

5. Use the horizontal cursors to measure VACDRP and VDCDRP,

as shown in Figure 15. Do not measure the undershoot or

overshoot that occurs immediately after this step.

6. If the difference between VACDRP and VDCDRP is more than

a few millivolts, use Equation 44 to adjust CCS. It may be

necessary to try several parallel values to obtain an adequate

one, because there are limited standard capacitor values

available. It is a good idea to have locations for two capacitors

in the layout for this reason.

CCS(NEW )

= CCS(OLD )

×

V ACDRP

VDCDRP

(44)

7. Repeat Step 5 and Step 6 until no further adjustment of CCS

is needed. Once this is achieved, do not change CCS for the

remainder of the procedure.

8. Set the dynamic load step to its maximum step size (but do

not use a step size that is larger than needed) and verify

that the output waveform is square, meaning VACDRP and

VDCDRP are equal.

Set the Initial Transient

1. With the dynamic load set at the maximum step size,

expand the scope time scale to either 2 μs/div or 5 μs/div.

This may result in a waveform that has two overshoots and

Figure 16. Transient Setting Waveform

2. If both overshoots are larger than desired, try the following

adjustments in the order shown:

• Increase the ramp resistor by 25% (RRAMP).

• For VTRAN1, increase CBB or increase the switching

frequency.

• For VTRAN2, increase RA by 25% and decrease CA by 25%.

If these adjustments do not change the response, it is

because the system is limited by the output decoupling.

Check the output response and the switching nodes each

time a change is made to ensure that the response is stable.

3. For load release (see Figure 17), if VTRANREL is larger than

the allowed overshoot, there is not enough output

capacitance. Either increase the capacitance directly or

decrease the inductor values. If the inductors are changed,

however, it will be necessary to redesign the circuit using

the information from the spreadsheet and to repeat all

tuning guide procedures.

VTRANREL

VDROOP

Figure 17. Transient Setting Waveform

Because the ADP3193A turns off all of the phases (switches

inductors to ground), no ripple voltage is present during load

release. Therefore, the user does not have to add headroom for

ripple, which allows load release VTRANREL to be larger than

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