M48T08-150PC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M48T08-150PC

CMOS 8K x 8 TIMEKEEPER SRAM

STMicroelectronics 

M48Z02, M48Z12

Table 2. Absolute Maximum Ratings

Symbol

TA

Parameter

Ambient Operating Temperature

grade 1

grade 6

Value

Unit

0 to 70

–40 to 85

°C

TSTG

Storage Temperature (VCC Off)

–40 to 85

°C

VIO

Input or Output Voltages

–0.3 to 7

V

VCC

Supply Voltage

–0.3 to 7

V

IO

Output Current

20

mA

PD

Power Dissipation

1

W

Note: Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this

specification is not implied. Exposure to the absolute maximum ratings conditions for extended periods of time may affect reliability.

CAUTION: Negative undershoots below –0.3 volts are not allowed on any pin while in the Battery Back-up mode.

Table 3. Operating Modes

Mode

VCC

E

G

W

DQ0-DQ7

Power

Deselect

VIH

X

X

High Z

Standby

4.75V to 5.5V

Write

or

VIL

X

VIL

DIN

Active

Read

4.5V to 5.5V

VIL

VIL

VIH

DOUT

Active

Read

VIL

VIH

VIH

High Z

Active

Deselect VSO to VPFD (min)

X

X

X

High Z

CMOS Standby

Deselect

Note: X = VIH or VIL

≤ VSO

X

X

X

High Z Battery Back-up Mode

Figure 2. DIP Pin Connections

A7 1

A6 2

24 VCC

23 A8

A5 3

22 A9

A4 4

21 W

A3 5

20 G

A2 6 M48Z02 19 A10

A1 7 M48Z12 18 E

A0 8

17 DQ7

DQ0 9

16 DQ6

DQ1 10

15 DQ5

DQ2 11

14 DQ4

VSS 12

13 DQ3

AI01187

2/12

DESCRIPTION (cont’d)

The M48Z02,12 button cell has sufficient capacity

and storage life to maintain data and clock function-

ality for an accumulated time period of at least 10

years in the absence of power over the operating

temperature range.

The M48Z02,12 is a non-volatile pin and function

equivalent to any JEDEC standard 2K x 8 SRAM.

It also easily fits into many ROM, EPROM, and

EEPROM sockets, providing the non-volatility of

PROMs without any requirement for special write

timing or limitations on the number of writes that

can be performed.

The M48Z02,12 also has its own Power-fail Detect

circuit. The control circuitry constantly monitors the

single 5V supply for an out of tolerance condition.

When VCC is out of tolerance, the circuit write

protects the SRAM, providing a high degree of data

security in the midst of unpredictablesystem opera-

tion brought on by low VCC. As VCC falls below

approximately 3V, the control circuitry connects the

battery which maintains data and clock operation

until valid power returns.

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